fround.s

No synopsis available.

This instruction is defined by:

  • Zfa, version >= 0

This instruction is included in the following profiles:

  • RVA23U64 (Mandatory)

  • RVB23U64 (Mandatory)

Encoding

svg

Assembly format

fround.s fd, rs1, rm

Synopsis

This instruction must have data-independent timing when extension Zkt is enabled.

No description available.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<5> rs1 = $encoding[19:15];
Bits<3> rm = $encoding[14:12];
Bits<5> fd = $encoding[11:7];

Execution

  • IDL

  • Sail

{
  let rs1_val_S = F_S(rs1);

  match (select_instr_or_fcsr_rm(rm)) {
    None() => { handle_illegal(); RETIRE_FAIL },
    Some(rm') => {
      let rm_3b =  encdec_rounding_mode(rm');
      let (fflags, rd_val_S) = riscv_f32roundToInt(rm_3b, rs1_val_S, false);

      accrue_fflags(fflags);
      F_S(rd) = rd_val_S;
      RETIRE_SUCCESS
    }
  }
}