scountovf

Supervisor Count Overflow

A 32-bit read-only register that contains shadow copies of the OF bits in the 29 mhpmevent CSRs (mhpmevent3 - mhpmevent31) — where scountovf bit X corresponds to mhpmeventX.

This register enables supervisor-level overflow interrupt handler software to quickly and easily determine which counter(s) have overflowed without needing to make an execution environment call up to M-mode.

Read access to bit X is subject to the same mcounteren (or mcounteren and hcounteren) CSRs that mediate access to the hpmcounter CSRs by S-mode (or VS-mode).

In M-mode, scountovf bit X is always readable. In S/HS-mode, scountovf bit X is readable when mcounteren bit X is set, and otherwise reads as zero. Similarly, in VS-mode, it is readable when both mcounteren and hcounteren bit X are set.

Attributes

Requirement

Sscofpmf

Defining extensions

Sscofpmf

Counter Overflow and Privilege Mode Filtering

CSR Address

0xda0

Length

32-bit

Privilege Mode

S

Format

scountovf format
Figure 1. scountovf format

Field Summary

Name Location Type Reset Value

scountovf.OF3

3

[when,"HPM_COUNTER_EN[3]"] RO

[when,"!(HPM_COUNTER_EN[3])"] RO-H

UNDEFINED_LEGAL

scountovf.OF4

4

[when,"HPM_COUNTER_EN[4]"] RO

[when,"!(HPM_COUNTER_EN[4])"] RO-H

UNDEFINED_LEGAL

scountovf.OF5

5

[when,"HPM_COUNTER_EN[5]"] RO

[when,"!(HPM_COUNTER_EN[5])"] RO-H

UNDEFINED_LEGAL

scountovf.OF6

6

[when,"HPM_COUNTER_EN[6]"] RO

[when,"!(HPM_COUNTER_EN[6])"] RO-H

UNDEFINED_LEGAL

scountovf.OF7

7

[when,"HPM_COUNTER_EN[7]"] RO

[when,"!(HPM_COUNTER_EN[7])"] RO-H

UNDEFINED_LEGAL

scountovf.OF8

8

[when,"HPM_COUNTER_EN[8]"] RO

[when,"!(HPM_COUNTER_EN[8])"] RO-H

UNDEFINED_LEGAL

scountovf.OF9

9

[when,"HPM_COUNTER_EN[9]"] RO

[when,"!(HPM_COUNTER_EN[9])"] RO-H

UNDEFINED_LEGAL

scountovf.OF10

10

[when,"HPM_COUNTER_EN[10]"] RO

[when,"!(HPM_COUNTER_EN[10])"] RO-H

UNDEFINED_LEGAL

scountovf.OF11

11

[when,"HPM_COUNTER_EN[11]"] RO

[when,"!(HPM_COUNTER_EN[11])"] RO-H

UNDEFINED_LEGAL

scountovf.OF12

12

[when,"HPM_COUNTER_EN[12]"] RO

[when,"!(HPM_COUNTER_EN[12])"] RO-H

UNDEFINED_LEGAL

scountovf.OF13

13

[when,"HPM_COUNTER_EN[13]"] RO

[when,"!(HPM_COUNTER_EN[13])"] RO-H

UNDEFINED_LEGAL

scountovf.OF14

14

[when,"HPM_COUNTER_EN[14]"] RO

[when,"!(HPM_COUNTER_EN[14])"] RO-H

UNDEFINED_LEGAL

scountovf.OF15

15

[when,"HPM_COUNTER_EN[15]"] RO

[when,"!(HPM_COUNTER_EN[15])"] RO-H

UNDEFINED_LEGAL

scountovf.OF16

16

[when,"HPM_COUNTER_EN[16]"] RO

[when,"!(HPM_COUNTER_EN[16])"] RO-H

UNDEFINED_LEGAL

scountovf.OF17

17

[when,"HPM_COUNTER_EN[17]"] RO

[when,"!(HPM_COUNTER_EN[17])"] RO-H

UNDEFINED_LEGAL

scountovf.OF18

18

[when,"HPM_COUNTER_EN[18]"] RO

[when,"!(HPM_COUNTER_EN[18])"] RO-H

UNDEFINED_LEGAL

scountovf.OF19

19

[when,"HPM_COUNTER_EN[19]"] RO

[when,"!(HPM_COUNTER_EN[19])"] RO-H

UNDEFINED_LEGAL

scountovf.OF20

20

[when,"HPM_COUNTER_EN[20]"] RO

[when,"!(HPM_COUNTER_EN[20])"] RO-H

UNDEFINED_LEGAL

scountovf.OF21

21

[when,"HPM_COUNTER_EN[21]"] RO

[when,"!(HPM_COUNTER_EN[21])"] RO-H

UNDEFINED_LEGAL

scountovf.OF22

22

[when,"HPM_COUNTER_EN[22]"] RO

[when,"!(HPM_COUNTER_EN[22])"] RO-H

UNDEFINED_LEGAL

scountovf.OF23

23

[when,"HPM_COUNTER_EN[23]"] RO

[when,"!(HPM_COUNTER_EN[23])"] RO-H

UNDEFINED_LEGAL

scountovf.OF24

24

[when,"HPM_COUNTER_EN[24]"] RO

[when,"!(HPM_COUNTER_EN[24])"] RO-H

UNDEFINED_LEGAL

scountovf.OF25

25

[when,"HPM_COUNTER_EN[25]"] RO

[when,"!(HPM_COUNTER_EN[25])"] RO-H

UNDEFINED_LEGAL

scountovf.OF26

26

[when,"HPM_COUNTER_EN[26]"] RO

[when,"!(HPM_COUNTER_EN[26])"] RO-H

UNDEFINED_LEGAL

scountovf.OF27

27

[when,"HPM_COUNTER_EN[27]"] RO

[when,"!(HPM_COUNTER_EN[27])"] RO-H

UNDEFINED_LEGAL

scountovf.OF28

28

[when,"HPM_COUNTER_EN[28]"] RO

[when,"!(HPM_COUNTER_EN[28])"] RO-H

UNDEFINED_LEGAL

scountovf.OF29

29

[when,"HPM_COUNTER_EN[29]"] RO

[when,"!(HPM_COUNTER_EN[29])"] RO-H

UNDEFINED_LEGAL

scountovf.OF30

30

[when,"HPM_COUNTER_EN[30]"] RO

[when,"!(HPM_COUNTER_EN[30])"] RO-H

UNDEFINED_LEGAL

scountovf.OF31

31

[when,"HPM_COUNTER_EN[31]"] RO

[when,"!(HPM_COUNTER_EN[31])"] RO-H

UNDEFINED_LEGAL

Fields

OF3

Location

3

Description

Shadow copy of mhpmevent3 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF4

Location

4

Description

Shadow copy of mhpmevent4 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF5

Location

5

Description

Shadow copy of mhpmevent5 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF6

Location

6

Description

Shadow copy of mhpmevent6 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF7

Location

7

Description

Shadow copy of mhpmevent7 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF8

Location

8

Description

Shadow copy of mhpmevent8 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF9

Location

9

Description

Shadow copy of mhpmevent9 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF10

Location

10

Description

Shadow copy of mhpmevent10 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF11

Location

11

Description

Shadow copy of mhpmevent11 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF12

Location

12

Description

Shadow copy of mhpmevent12 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF13

Location

13

Description

Shadow copy of mhpmevent13 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF14

Location

14

Description

Shadow copy of mhpmevent14 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF15

Location

15

Description

Shadow copy of mhpmevent15 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF16

Location

16

Description

Shadow copy of mhpmevent16 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF17

Location

17

Description

Shadow copy of mhpmevent17 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF18

Location

18

Description

Shadow copy of mhpmevent18 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF19

Location

19

Description

Shadow copy of mhpmevent19 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF20

Location

20

Description

Shadow copy of mhpmevent20 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF21

Location

21

Description

Shadow copy of mhpmevent21 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF22

Location

22

Description

Shadow copy of mhpmevent22 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF23

Location

23

Description

Shadow copy of mhpmevent23 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF24

Location

24

Description

Shadow copy of mhpmevent24 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF25

Location

25

Description

Shadow copy of mhpmevent25 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF26

Location

26

Description

Shadow copy of mhpmevent26 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF27

Location

27

Description

Shadow copy of mhpmevent27 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF28

Location

28

Description

Shadow copy of mhpmevent28 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF29

Location

29

Description

Shadow copy of mhpmevent29 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF30

Location

30

Description

Shadow copy of mhpmevent30 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

OF31

Location

31

Description

Shadow copy of mhpmevent31 overflow (OF) bit.

This field is read-only zero because the counter is not enabled.

Type

RO

RO-H

Reset value

UNDEFINED_LEGAL

Software read

This CSR may return a value that is different from what is stored in hardware.

Bits<32> mask;
if (mode() == PrivilegeMode::VS) {
  mask = $bits(CSR[CSR[mcounteren]]) & $bits(CSR[CSR[hcounteren]]);
} else {
  mask = $bits(CSR[CSR[mcounteren]]) & $bits(CSR[CSR[scounteren]]);
}
Bits<32> value = 0;
value = value | (CSR[mhpmevent3].OF << 3);
value = value | (CSR[mhpmevent4].OF << 4);
value = value | (CSR[mhpmevent5].OF << 5);
value = value | (CSR[mhpmevent6].OF << 6);
value = value | (CSR[mhpmevent7].OF << 7);
value = value | (CSR[mhpmevent8].OF << 8);
value = value | (CSR[mhpmevent9].OF << 9);
value = value | (CSR[mhpmevent10].OF << 10);
value = value | (CSR[mhpmevent11].OF << 11);
value = value | (CSR[mhpmevent12].OF << 12);
value = value | (CSR[mhpmevent13].OF << 13);
value = value | (CSR[mhpmevent14].OF << 14);
value = value | (CSR[mhpmevent15].OF << 15);
value = value | (CSR[mhpmevent16].OF << 16);
value = value | (CSR[mhpmevent17].OF << 17);
value = value | (CSR[mhpmevent18].OF << 18);
value = value | (CSR[mhpmevent19].OF << 19);
value = value | (CSR[mhpmevent20].OF << 20);
value = value | (CSR[mhpmevent21].OF << 21);
value = value | (CSR[mhpmevent22].OF << 22);
value = value | (CSR[mhpmevent23].OF << 23);
value = value | (CSR[mhpmevent24].OF << 24);
value = value | (CSR[mhpmevent25].OF << 25);
value = value | (CSR[mhpmevent26].OF << 26);
value = value | (CSR[mhpmevent27].OF << 27);
value = value | (CSR[mhpmevent28].OF << 28);
value = value | (CSR[mhpmevent29].OF << 29);
value = value | (CSR[mhpmevent30].OF << 30);
value = value | (CSR[mhpmevent31].OF << 31);
return value & mask;