mstateen1h

Upper 32 bits of Machine State Enable 1 Register

For RV64 harts, the Smstateen extension adds four new 64-bit CSRs at machine level: mstateen0 (Machine State Enable 0), mstateen1, mstateen2, and mstateen3. For RV32, the registers listed above are 32-bit, and for the machine-level CSRs there is a corresponding set of high-half CSRs for the upper 32 bits of each register: mstateen0h, mstateen1h, mstateen2h, mstateen3h.

Attributes

Defining Extension

  • Smstateen, version >= Smstateen@1.0.0

CSR Address

0x31d

Length

32-bit

Privilege Mode

M

Format

mstateen1h format
Figure 1. mstateen1h format

Field Summary

Name Location Type Reset Value

mstateen1h.SE0

31

RW

0

Fields

SE0

Location

31

Description

The SE0 bit in mstateen1h controls access to the hstateen1, hstateen1h, and the sstateen1 CSRs.

Type

RW

Reset value

0

Software write

This CSR may store a value that is different from what software attempts to write.

When a software write occurs (e.g., through csrrw), the following determines the written value:

SE0 = CSR[mstateen1].SE0 = csr_value.SE0;
return csr_value.SE0;

Software read

This CSR may return a value that is different from what is stored in hardware.

return $bits(mstateen1)[63:32];