pmpcfg4
PMP Configuration Register 4
PMP entry configuration
Attributes
Requirement |
|||
|---|---|---|---|
Defining extensions |
|
||
CSR Address |
0x3a4 |
||
Length |
* 32 when CSR[misa].MXL == 0 * 64 when CSR[misa].MXL == 1 |
||
Privilege Mode |
M |
Format
This CSR format changes dynamically.
Field Summary
| Name | Location | Type | Reset Value |
|---|---|---|---|
7:0 |
[when,"(NUM_PMP_ENTRIES > 16)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 16)"] RO |
0 |
|
15:8 |
[when,"(NUM_PMP_ENTRIES > 17)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 17)"] RO |
0 |
|
23:16 |
[when,"(NUM_PMP_ENTRIES > 18)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 18)"] RO |
0 |
|
31:24 |
[when,"(NUM_PMP_ENTRIES > 19)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 19)"] RO |
0 |
|
39:32 |
[when,"(NUM_PMP_ENTRIES > 20)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 20)"] RO |
0 |
|
47:40 |
[when,"(NUM_PMP_ENTRIES > 21)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 21)"] RO |
0 |
|
55:48 |
[when,"(NUM_PMP_ENTRIES > 22)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 22)"] RO |
0 |
|
63:56 |
[when,"(NUM_PMP_ENTRIES > 23)"] RW-R [when,"(NUM_PMP_ENTRIES ⇐ 23)"] RO |
0 |
Fields
pmp16cfg
- Location
-
7:0
- Description
-
PMP configuration for entry 16
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
7 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
6:5 |
Reserved Writes shall be ignored. |
A |
4:3 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
2 |
When clear, instruction fetches cause an |
W |
1 |
When clear, stores and AMOs cause an |
R |
0 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp17cfg
- Location
-
15:8
- Description
-
PMP configuration for entry 17
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
15 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
14:13 |
Reserved Writes shall be ignored. |
A |
12:11 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
10 |
When clear, instruction fetches cause an |
W |
9 |
When clear, stores and AMOs cause an |
R |
8 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp18cfg
- Location
-
23:16
- Description
-
PMP configuration for entry 18
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
23 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
22:21 |
Reserved Writes shall be ignored. |
A |
20:19 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
18 |
When clear, instruction fetches cause an |
W |
17 |
When clear, stores and AMOs cause an |
R |
16 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp19cfg
- Location
-
31:24
- Description
-
PMP configuration for entry 19
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
31 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
30:29 |
Reserved Writes shall be ignored. |
A |
28:27 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
26 |
When clear, instruction fetches cause an |
W |
25 |
When clear, stores and AMOs cause an |
R |
24 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp20cfg
- Location
-
39:32
- Description
-
PMP configuration for entry 20
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
39 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
38:37 |
Reserved Writes shall be ignored. |
A |
36:35 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
34 |
When clear, instruction fetches cause an |
W |
33 |
When clear, stores and AMOs cause an |
R |
32 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp21cfg
- Location
-
47:40
- Description
-
PMP configuration for entry 21
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
47 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
46:45 |
Reserved Writes shall be ignored. |
A |
44:43 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
42 |
When clear, instruction fetches cause an |
W |
41 |
When clear, stores and AMOs cause an |
R |
40 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp22cfg
- Location
-
55:48
- Description
-
PMP configuration for entry 22
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
55 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
54:53 |
Reserved Writes shall be ignored. |
A |
52:51 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
50 |
When clear, instruction fetches cause an |
W |
49 |
When clear, stores and AMOs cause an |
R |
48 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
pmp23cfg
- Location
-
63:56
- Description
-
PMP configuration for entry 23
The bits are as follows:
| Name | Location | Description |
|---|---|---|
L |
63 |
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry. |
- |
62:61 |
Reserved Writes shall be ignored. |
A |
60:59 |
Address matching mode. One of: [when="PMP_GRANULARITY < 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NA4* (2) - Naturally aligned four-byte region * *NAPOT* (3) - Naturally aligned power of two [when="PMP_GRANULARITY >= 2"] * *OFF* (0) - Null region (disabled) * *TOR* (1) - Top of range * *NAPOT* (3) - Naturally aligned power of two Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes). |
X |
58 |
When clear, instruction fetches cause an |
W |
57 |
When clear, stores and AMOs cause an |
R |
56 |
When clear, loads cause an |
The combination of R = 0, W = 1 is reserved.
- Type
RW-R
RO
- Reset value
-
0
Software write
This CSR may store a value that is different from what software attempts to write.
When a software write occurs (e.g., through csrrw), the following determines the written value:
pmp16cfg = if ((CSR[pmpcfg4].pmp16cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp16cfg & 0x1) == 0) && ((csr_value.pmp16cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp16cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp16cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp16cfg;
pmp17cfg = if ((CSR[pmpcfg4].pmp17cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp17cfg & 0x1) == 0) && ((csr_value.pmp17cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp17cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp17cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp17cfg;
pmp18cfg = if ((CSR[pmpcfg4].pmp18cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp18cfg & 0x1) == 0) && ((csr_value.pmp18cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp18cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp18cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp18cfg;
pmp19cfg = if ((CSR[pmpcfg4].pmp19cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp19cfg & 0x1) == 0) && ((csr_value.pmp19cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp19cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp19cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp19cfg;
pmp20cfg = if ((CSR[pmpcfg4].pmp20cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp20cfg & 0x1) == 0) && ((csr_value.pmp20cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp20cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp20cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp20cfg;
pmp21cfg = if ((xlen() == 64) && (CSR[pmpcfg4].pmp21cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp21cfg & 0x1) == 0) && ((csr_value.pmp21cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp21cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp21cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp21cfg;
pmp22cfg = if ((xlen() == 64) && (CSR[pmpcfg4].pmp22cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp22cfg & 0x1) == 0) && ((csr_value.pmp22cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp22cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp22cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp22cfg;
pmp23cfg = if ((xlen() == 64) && (CSR[pmpcfg4].pmp23cfg & 0x80) == 0) {
# entry is not locked
if (!(((csr_value.pmp23cfg & 0x1) == 0) && ((csr_value.pmp23cfg & 0x2) == 0x2))) {
# not R = 0, W =1, which is reserved
if ((PMP_GRANULARITY < 2) ||
((csr_value.pmp23cfg & 0x18) != 0x10)) {
# NA4 is not allowed when PMP granularity is larger than 4 bytes
return csr_value.pmp23cfg;
}
}
}
# fall through: keep old value
return CSR[pmpcfg4].pmp23cfg;