mtvec
Machine Trap Vector Control
Controls where traps jump.
Attributes
Defining Extension |
Sm, version >= Sm@1.11.0 |
|---|---|
CSR Address |
0x305 |
Length |
* 32 when CSR[misa].MXL == 0 * 64 when CSR[misa].MXL == 1 |
Privilege Mode |
M |
Format
This CSR format changes dynamically.
Figure 1. mtvec Format when CSR[misa].MXL == 0
Figure 2. mtvec Format when CSR[misa].MXL == 1
Field Summary
| Name | Location | Type | Reset Value |
|---|---|---|---|
* 31:2 when CSR[misa].MXL == 0 * 63:2 when CSR[misa].MXL == 1 |
RW-R |
0 |
|
1:0 |
RW-R |
UNDEFINED_LEGAL |
Software write
This CSR may store a value that is different from what software attempts to write.
When a software write occurs (e.g., through csrrw), the following determines the written value:
BASE = # Base spec says that BASE must be 4-byte aligned, which will always be the case
# implementations may put further constraints on BASE when MODE != Direct
# If that is the case, stvec should have an override for the implementation
return csr_value.BASE;
MODE = if (csr_value.MODE == 0) {
if (ary_includes?<$array_size(MTVEC_MODES), 2>(MTVEC_MODES, 0)) {
return csr_value.MODE;
} else {
return UNDEFINED_LEGAL_DETERMINISTIC;
}
} else if (csr_value.MODE == 1) {
if (ary_includes?<$array_size(MTVEC_MODES), 2>(MTVEC_MODES, 1)) {
return csr_value.MODE;
} else {
return UNDEFINED_LEGAL_DETERMINISTIC;
}
} else {
return UNDEFINED_LEGAL_DETERMINISTIC;
}