clmulh

Carry-less multiply (high-part)

Assembly format

clmulh rd, rs1, rs2

Synopsis

This instruction must have data-independent timing when extension Zkt is enabled.

clmulh produces the upper half of the 2*XLEN carry-less product

Decode Variables

Bits<5> rs2 = $encoding[24:20];
Bits<5> rs1 = $encoding[19:15];
Bits<5> rd = $encoding[11:7];

Execution

  • IDL

  • Sail

if (implemented?(ExtensionName::B) && (misa.B == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
XReg rs1_val = X[rs1];
XReg rs2_val = X[rs2];
XReg output = 0;
for (U32 i = 1; i <= xlen(); i++) {
  output = (rs2_val : output;
}
X[rd] = output;
{
  let rs1_val = X(rs1);
  let rs2_val = X(rs2);
  result : xlenbits = zeros();
  foreach (i from 0 to (xlen_val - 1))
    if rs2_val[i] == bitone then result = result ^ (rs1_val >> (xlen_val - i));
  X(rd) = result;
  RETIRE_SUCCESS
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

Encoding

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Defining extension

  • anyOf:

    • Zbc, version >= Zbc@1.0.0

    • Zbkc, version >= Zbkc@1.0.0

Access

M HS U VS VU

Always

Always

Always

Always

Always

Containing profiles

  • Mandatory:

  • Optional: RVA22S64, RVA22U64, RVA23M64, RVA23S64, RVA23U64, RVB23M64, RVB23S64, RVB23U64