mscontext
Machine Supervisor Context
This optional register is an alias for scontext. It is only accessible in S/HS-mode, M-mode and Debug Mode. It is included for backward compatibility with version 0.13.
The encoding of this CSR does not conform to the CSR Address Mapping Convention in the Privileged Spec. It is expected that new implementations will not support this encoding and that new debuggers will not use this CSR if scontext is available.
Attributes
Defining Extension |
allOf: * Sdtrig, version >= Sdtrig@1.0.0 * S, version >= S@1.11.0 |
|---|---|
CSR Address |
0x7aa |
Length |
* 32 when (priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 0) |
(priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == %%) |
|
(priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == %%) * 64 when (priv_mode() == PrivilegeMode::M && CSR[misa].MXL == 1) |
|
(priv_mode() == PrivilegeMode::S && CSR[mstatus].SXL == %%) |
|
(priv_mode() == PrivilegeMode::VS && CSR[hstatus].VSXL == %%) |
|
Privilege Mode |
S |
Format
This CSR format changes dynamically.