mhpmcounter8

Machine Hardware Performance Counter 8

Programmable hardware performance counter.

Attributes

Defining Extension

CSR Address

0xb08

Length

64-bit

Privilege Mode

Figure 1. mhpmcounter8 format

Name	Location	Type	Reset Value
mhpmcounter8.COUNT	63:0		UNDEFINED_LEGAL

Name

Location

Type

Reset Value

63:0

UNDEFINED_LEGAL

Performance counter for event selected in mhpmevent8.EVENT.

Increments every time event occurs unless:

mcountinhibit.HPM8 <%- if ext?(:Smcdeleg) -%>or its alias scountinhibit.HPM8<%- end -%> is set <%- if ext?(:Sscofpmf) -%>
mhpmevent8.MINH is set and the current privilege level is M <%- if ext?(:S) -%>
mhpmevent8.SINH <%- if ext?(:Ssccfg) -%>or its alias hpmevent8..SINH<%- end -%> is set and the current privilege level is (H)S <%- end -%> <%- if ext?(:U) -%>
mhpmevent8.UINH <%- if ext?(:Ssccfg) -%>or its alias hpmevent8.SINH<%- end -%> is set and the current privilege level is U <%- end -%> <%- if ext?(:H) -%>
mhpmevent8.VSINH <%- if ext?(:Ssccfg) -%>or its alias hpmevent8.SINH<%- end -%> is set and the current privilege level is VS
mhpmevent8.VUINH <%- if ext?(:Ssccfg) -%>or its alias hpmevent8.SINH<%- end -%> is set and the current privilege level is VU <%- end -%> <%- end -%>

Unimplemented performance counter. Must be read-only 0 (access does not cause trap).

This CSR may return a value that is different from what is stored in hardware.

if (HPM_COUNTER_EN[8]) {
  return read_hpm_counter(8);
} else {
  return 0;
}