srl
Shift right logical
Logical shift the value in xs1 right by the value in the lower bits of xs2, and store the result in xd.
| This instruction must have data-independent timing when extension Zkt is enabled. |
Decode Variables
Bits<5> xs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];Execution
-
IDL
-
Sail
if (xlen() == 64) {
X[xd] = X[xs1] >> X[xs2][5:0];
} else {
X[xd] = X[xs1] >> X[xs2][4:0];
}{
let xs1_val = X(xs1);
let xs2_val = X(xs2);
let result : xlenbits = match op {
RISCV_ADD => xs1_val + xs2_val,
RISCV_SLT => zero_extend(bool_to_bits(xs1_val <_s xs2_val)),
RISCV_SLTU => zero_extend(bool_to_bits(xs1_val <_u xs2_val)),
RISCV_AND => xs1_val & xs2_val,
RISCV_OR => xs1_val | xs2_val,
RISCV_XOR => xs1_val ^ xs2_val,
RISCV_SLL => if sizeof(xlen) == 32
then xs1_val << (xs2_val[4..0])
else xs1_val << (xs2_val[5..0]),
RISCV_SRL => if sizeof(xlen) == 32
then xs1_val >> (xs2_val[4..0])
else xs1_val >> (xs2_val[5..0]),
RISCV_SUB => xs1_val - xs2_val,
RISCV_SRA => if sizeof(xlen) == 32
then shift_right_arith32(xs1_val, xs2_val[4..0])
else shift_right_arith64(xs1_val, xs2_val[5..0])
};
X(xd) = result;
RETIRE_SUCCESS
}