minstretcfgh
Machine Instructions-Retired Counter Configuration High
Upper 32 bits of the 64-bit minstretcfg CSR, used on RV32 systems to access privilege mode filtering inhibit bits for instruction retirement.
Attributes
Requirement |
|||
|---|---|---|---|
Defining extensions |
|
||
CSR Address |
0x722 |
||
Length |
32-bit |
||
Privilege Mode |
M |
Field Summary
| Name | Location | Type | Reset Value |
|---|---|---|---|
30 |
RW |
UNDEFINED_LEGAL |
|
29 |
RW |
UNDEFINED_LEGAL |
|
28 |
RW |
UNDEFINED_LEGAL |
|
27 |
RW |
UNDEFINED_LEGAL |
|
26 |
RW |
UNDEFINED_LEGAL |
Fields
MINH
- Location
-
30
- Description
-
If set, then counting of events in M-mode is inhibited.
- Type
-
RW
- Reset value
-
UNDEFINED_LEGAL
SINH
- Location
-
29
- Description
-
If set, then counting of events in S/HS-mode is inhibited.
- Type
-
RW
- Reset value
-
UNDEFINED_LEGAL
UINH
- Location
-
28
- Description
-
If set, then counting of events in U-mode is inhibited.
- Type
-
RW
- Reset value
-
UNDEFINED_LEGAL