minstretcfgh

Machine Instructions-Retired Counter Configuration High

Upper 32 bits of the 64-bit minstretcfg CSR, used on RV32 systems to access privilege mode filtering inhibit bits for instruction retirement.

Attributes

Defining Extension

  • Smcntrpmf, version >= Smcntrpmf@1.0.0

CSR Address

0x722

Length

32-bit

Privilege Mode

M

Format

minstretcfgh format
Figure 1. minstretcfgh format

Field Summary

Name Location Type Reset Value

minstretcfgh.MINH

30

RW

UNDEFINED_LEGAL

minstretcfgh.SINH

29

RW

UNDEFINED_LEGAL

minstretcfgh.UINH

28

RW

UNDEFINED_LEGAL

minstretcfgh.VSINH

27

RW

UNDEFINED_LEGAL

minstretcfgh.VUINH

26

RW

UNDEFINED_LEGAL

Fields

MINH

Location

30

Description

If set, then counting of events in M-mode is inhibited.

Type

RW

Reset value

UNDEFINED_LEGAL

SINH

Location

29

Description

If set, then counting of events in S/HS-mode is inhibited.

Type

RW

Reset value

UNDEFINED_LEGAL

UINH

Location

28

Description

If set, then counting of events in U-mode is inhibited.

Type

RW

Reset value

UNDEFINED_LEGAL

VSINH

Location

27

Description

If set, then counting of events in VS-mode is inhibited.

Type

RW

Reset value

UNDEFINED_LEGAL

VUINH

Location

26

Description

If set, then counting of events in VU-mode is inhibited.

Type

RW

Reset value

UNDEFINED_LEGAL