B Extension
Versions
- 1.0.0
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- State
-
ratified
- Ratification date
-
2024-04
- Ratification document
-
https://drive.google.com/file/d/1SgLoasaBjs5WboQMaU3wpHkjUwV71UZn/view
Synopsis
Bit 1 of the misa register encodes the presence of the B standard extension. When misa.B is 1, the implementation supports the instructions provided by the Zba, Zbb, and Zbs extensions. When misa.B is 0, it indicates that the implementation may not support one or more of the Zba, Zbb, or Zbs extensions.
Instructions
The following instructions are affected by this extension:
Add unsigned word |
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AND with inverted operand |
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Single-Bit clear (Register) |
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Single-Bit clear (Immediate) |
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Single-Bit extract (Register) |
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Single-Bit extract (Immediate) |
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Single-Bit invert (Register) |
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Single-Bit invert (Immediate) |
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Single-Bit set (Register) |
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Single-Bit set (Immediate) |
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Count leading zero bits |
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Count leading zero bits in word |
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Count set bits |
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Count set bits in word |
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Count trailing zero bits |
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Count trailing zero bits in word |
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Maximum |
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Unsigned maximum |
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Minimum |
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Unsigned minimum |
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Bitware OR-combine, byte granule |
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OR with inverted operand |
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Byte-reverse register (RV64 encoding) |
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Rotate left (Register) |
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Rotate left word (Register) |
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Rotate right (Register) |
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Rotate right (Immediate) |
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Rotate right word (Immediate) |
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Rotate right word (Register) |
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Sign-extend byte |
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Sign-extend halfword |
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Shift unsigned word left by 1 and add |
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Shift left by 1 and add |
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Shift unsigned word left by 2 and add |
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Shift left by 2 and add |
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Shift unsigned word left by 3 and add |
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Shift left by 3 and add |
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Shift left unsigned word (Immediate) |
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Exclusive NOR |