rev8

Byte-reverse register (RV64 encoding)

This instruction is defined by:

  • anyOf:

    • Zbb, version >= Zbb@1.0.0

    • Zbkb, version >= Zbkb@1.0.0

This instruction is included in the following profiles:

  • RVA22S64 (Mandatory)

  • RVA22U64 (Mandatory)

  • RVA23M64 (Mandatory)

  • RVA23S64 (Mandatory)

  • RVA23U64 (Mandatory)

  • RVB23M64 (Mandatory)

  • RVB23S64 (Mandatory)

  • RVB23U64 (Mandatory)

Encoding

This instruction has different encodings in RV32 and RV64.

  • RV32

  • RV64

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svg

Assembly format

rev8 rd, rs1

Synopsis

This instruction must have data-independent timing when extension Zkt is enabled.

This instruction reverses the order of the bytes in rs1.

The rev8 mnemonic corresponds to different instruction encodings in RV32 and RV64.
The byte-reverse operation is only available for the full register width. To emulate word-sized and halfword-sized byte-reversal, perform a rev8 rd,rs followed by a srai rd,rd,K, where K is XLEN-32 and XLEN-16, respectively.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

  • RV32

  • RV64

Bits<5> rs1 = $encoding[19:15];
Bits<5> rd = $encoding[11:7];
Bits<5> rs1 = $encoding[19:15];
Bits<5> rd = $encoding[11:7];

Execution

  • IDL

  • Sail

if (%%LINK%func;implemented?;implemented?%%(ExtensionName::B) && (%%LINK%csr_field;misa.B;CSR[misa].B%% == 1'b0)) {
  %%LINK%func;raise;raise%%(ExceptionCode::IllegalInstruction, %%LINK%func;mode;mode%%(), $encoding);
}
XReg input = X[rs1];
XReg output = 0;
XReg j = %%LINK%func;xlen;xlen%%() - 1;
for (U32 i = 0; i < (%%LINK%func;xlen;xlen%%() - 8); i = i + 8) {
  output[(i + 7):i] = input[j:(j - 7)];
  j = j - 8;
}
X[rd] = output;
{
  let rs1_val = X(rs1);
  result : xlenbits = zeros();
  foreach (i from 0 to (sizeof(xlen) - 8) by 8)
    result[(i + 7) .. i] = rs1_val[(sizeof(xlen) - i - 1) .. (sizeof(xlen) - i - 8)];
  X(rd) = result;
  RETIRE_SUCCESS
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction