mhpmevent21

Machine Hardware Performance Counter 21 Control

Programmable hardware performance counter event selector <% if ext?(:Sscofpmf) %> and overflow/filtering control<% end %>

Attributes

Defining Extension	Smhpm, version >= Smhpm@1.11.0
CSR Address	0x335
Length	64-bit
Privilege Mode	M

Defining Extension

Smhpm, version >= Smhpm@1.11.0

CSR Address

0x335

Length

64-bit

Privilege Mode

Format

Figure 1. mhpmevent21 format

Field Summary

Name	Location	Reset Value
mhpmevent21.OF	63	UNDEFINED_LEGAL
mhpmevent21.MINH	62	UNDEFINED_LEGAL
mhpmevent21.SINH	61	UNDEFINED_LEGAL
mhpmevent21.UINH	60	UNDEFINED_LEGAL
mhpmevent21.VSINH	59	UNDEFINED_LEGAL
mhpmevent21.VUINH	58	UNDEFINED_LEGAL
mhpmevent21.EVENT	57:0	UNDEFINED_LEGAL

Name

Location

Type

Reset Value

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

57:0

UNDEFINED_LEGAL

Fields

`OF`

Location: 63
Description: Overflow status and interrupt disable.

The OF bit is set when the corresponding hpmcounter overflows, and remains set until written by software. Since hpmcounter values are unsigned values, overflow is defined as unsigned overflow of the implemented counter bits.

The OF bit is sticky; it stays set until explicitly cleared by a CSR write.

A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter21 overflows.

Type
Reset value: UNDEFINED_LEGAL

`MINH`

Location: 62
Description: When set, mhpmcounter21 does not increment while the hart in operating in M-mode.
Type
Reset value: UNDEFINED_LEGAL

`SINH`

Location: 61
Description: When set, mhpmcounter21 does not increment while the hart in operating in (H)S-mode.
Type
Reset value: UNDEFINED_LEGAL

`UINH`

Location: 60
Description: When set, mhpmcounter21 does not increment while the hart in operating in U-mode.
Type
Reset value: UNDEFINED_LEGAL

`VSINH`

Location: 59
Description: When set, mhpmcounter21 does not increment while the hart in operating in VS-mode.
Type
Reset value: UNDEFINED_LEGAL

`VUINH`

Location: 58
Description: When set, mhpmcounter21 does not increment while the hart in operating in VU-mode.
Type
Reset value: UNDEFINED_LEGAL

`EVENT`

Location: 57:0
Description: Event selector for performance counter mhpmcounter21.
Type
Reset value: UNDEFINED_LEGAL

Software write

This CSR may store a value that is different from what software attempts to write.

When a software write occurs (e.g., through csrrw), the following determines the written value:

OF = csr_value.OF
MINH = csr_value.MINH
SINH = csr_value.SINH
UINH = csr_value.UINH
VSINH = csr_value.VSINH
VUINH = csr_value.VUINH
EVENT = if (ary_includes?<$array_size(HPM_EVENTS), 58>(HPM_EVENTS, csr_value.EVENT)) {
  return csr_value.EVENT;
} else {
  return UNDEFINED_LEGAL_DETERMINISTIC;
}