siselect
Supervisor Indirect Register Select
The siselect register will support the value range 0..0xFFF at a minimum. A future extension may define a value range outside of this minimum range. Only if such an extension is implemented will siselect be required to support larger values.
Requiring a range of 0-0xFFF for siselect, even though most or all of the space may be reserved or inaccessible, permits M-mode to emulate indirectly accessed registers in this implemented range, including registers that may be standardized in the future.
Values of siselect with the most-significant bit set (bit XLEN - 1 = 1) are designated only for custom use, presumably for accessing custom registers through the alias CSRs. Values of siselect with the most-significant bit clear are designated only for standard use and are reserved until allocated to a standard architecture extension. If XLEN is changed, the most-significant bit of siselect moves to the new position, retaining its value from before.
Attributes
Requirement |
|||
|---|---|---|---|
Defining extensions |
|
||
CSR Address |
0x150 |
||
Length |
* 32 when CSR[mstatus].SXL == 0 * 64 when CSR[mstatus].SXL == 1 |
||
Privilege Mode |
S |
Format
This CSR format changes dynamically.
Field Summary
| Name | Location | Type | Reset Value |
|---|---|---|---|
* 31:0 when CSR[mstatus].SXL == 0 * 63:0 when CSR[mstatus].SXL == 1 |
RW |
UNDEFINED_LEGAL |
Fields
VALUE
- Location
-
-
31:0 when CSR[mstatus].SXL == 0
-
63:0 when CSR[mstatus].SXL == 1
-
- Description
-
Value ranges are allocated to dependent extensions, which specify the register state accessible via each
sireg*register, for each siselect value. - Type
-
RW
- Reset value
-
UNDEFINED_LEGAL