ld

Load doubleword to even/odd register pair

This instruction is defined by:

  • Zilsd, version >= Zilsd@1.0.0

This instruction is included in the following profiles:

Encoding

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Assembly format

ld rd, offset(rs1)

Synopsis

Loads a 64-bit value into registers rd and rd+1. The effective address is obtained by adding register rs1 to the sign-extended 12-bit offset.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<5> rd = $encoding[11:7];
Bits<5> rs1 = $encoding[19:15];
Bits<12> imm = $encoding[31:20];

Execution

  • IDL

  • Sail

Bits<MXLEN> base = X[rs1];
Bits<MXLEN> offset = $signed(imm);
Bits<MXLEN> eff_addr = base + offset;
Bits<64> data = %%LINK%func;read_memory;read_memory%%<64>(eff_addr, $encoding);
X[rd] = data[31:0];
X[rd + 1] = data[63:32];

Exceptions

This instruction may result in the following synchronous exceptions:

  • LoadAccessFault

  • LoadAddressMisaligned

  • LoadPageFault