addw
Add word
Add the 32-bit values in xs1 to xs2, and store the sign-extended result in xd. Any overflow is thrown away.
| This instruction must have data-independent timing when extension Zkt is enabled. |
Decode Variables
Bits<5> xs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];Execution
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IDL
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Sail
{
let xs1_val = (X(xs1))[31..0];
let xs2_val = (X(xs2))[31..0];
let result : bits(32) = match op {
RISCV_ADDW => xs1_val + xs2_val,
RISCV_SUBW => xs1_val - xs2_val,
RISCV_SLLW => xs1_val << (xs2_val[4..0]),
RISCV_SRLW => xs1_val >> (xs2_val[4..0]),
RISCV_SRAW => shift_right_arith32(xs1_val, xs2_val[4..0])
};
X(xd) = sign_extend(result);
RETIRE_SUCCESS
}