Smhpm Extension

Versions

Version 1.11.0

State

ratified

Ratification date

2019-12

Changes

  • Defined the mcountinhibit CSR, which stops performance counters from incrementing to reduce energy consumption.
Version 1.12.0

State

ratified

Ratification date

2021-12

Changes

  • PMP changes require an SFENCE.VMA on any hart that implements page-based virtual memory, even if VM is not currently enabled.

  • PMP reset values are now platform-defined.

  • An additional 48 optional PMP registers have been defined.
Version 1.13.0

State

frozen

Synopsis

M-mode programmable hardware performance counters

Parameters

This extension has the following implementation options (AKA parameters):

HPM_COUNTER_EN

Type

array

Valid Values

32-element array where:
  [0] is false
  [1] is false
  [2] is false
additional items are:
  boolean

Description

List of HPM counters that are enabled. There is one entry for each hpmcounter.

The first three entries must be false (as they correspond to CY, IR, TM in, e.g. mhmpcountinhibit) Index 3 in HPM_COUNTER_EN corresponds to hpmcounter3. Index 31 in HPM_COUNTER_EN corresponds to hpmcounter31.
HPM_EVENTS

Type

array

Valid Values

array of 58-bit integer

Description

List of defined event numbers that can be written into hpmeventN