add.uw

Add unsigned word

Performs an XLEN-wide addition between rs2 and the zero-extended least-significant word of rs1.

Assembly format

add.uw rd, rs1, rs2

Decode Variables

Bits<5> xs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];

Execution

  • IDL

  • Sail

if (implemented?(ExtensionName::B) && (misa.B == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
X[xd] = X[xs2] + X[xs1][31:0];
{
  let rs1_val = X(rs1);
  let rs2_val = X(rs2);
  let shamt : bits(2) = match op {
    RISCV_ADDUW    => 0b00,
    RISCV_SH1ADDUW => 0b01,
    RISCV_SH2ADDUW => 0b10,
    RISCV_SH3ADDUW => 0b11
  };
  let result : xlenbits = (zero_extend(rs1_val[31..0]) << shamt) + rs2_val;
  X(rd) = result;
  RETIRE_SUCCESS
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

Encoding

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Defining extension

  • Zba, version >= Zba@1.0.0

Access

M HS U VS VU

Always

Always

Always

Always

Always

Containing profiles

  • Mandatory: RVA22S64, RVA22U64, RVA23M64, RVA23S64, RVA23U64, RVB23M64, RVB23S64, RVB23U64

  • Optional: