fcvt.w.s
Convert single-precision float to signed word.
Converts a floating-point number in floating-point register fs1 to a signed 32-bit integer in integer register xd.
For XLEN >32, fcvt.w.s sign-extends the 32-bit result to the destination register width.
If the rounded result is not representable as a 32-bit signed integer, it is clipped to the nearest value and the invalid flag is set.
The range of valid inputs and behavior for invalid inputs are:
| Value | |
|---|---|
Minimum valid input (after rounding) |
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Maximum valid input (after rounding) |
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Output for out-of-range negative input |
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Output for |
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Output for out-of-range positive input |
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Output for |
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All floating-point to integer and integer to floating-point conversion instructions round
according to the rm field.
A floating-point register can be initialized to floating-point positive zero using
fcvt.s.w xd, x0, which will never set any exception flags.
All floating-point conversion instructions set the Inexact exception flag if the rounded result differs from the operand value and the Invalid exception flag is not set.
| This instruction must have data-independent timing when extension Zkt is enabled. |
Decode Variables
Bits<5> fs1 = $encoding[19:15];
Bits<3> rm = $encoding[14:12];
Bits<5> xd = $encoding[11:7];Execution
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IDL
-
Sail
check_f_ok($encoding);
RoundingMode rounding_mode = rm_to_mode(rm, $encoding);
X[xd] = f32_to_i32(X[fs1], rounding_mode);{
assert(sizeof(xlen) >= 64);
let rs1_val_LU = X(rs1)[63..0];
match (select_instr_or_fcsr_rm (rm)) {
None() => { handle_illegal(); RETIRE_FAIL },
Some(rm') => {
let rm_3b = encdec_rounding_mode(rm');
let (fflags, rd_val_S) = riscv_ui64ToF32 (rm_3b, rs1_val_LU);
accrue_fflags(fflags);
F_or_X_S(rd) = rd_val_S;
RETIRE_SUCCESS
}
}
}