hinval.gvma

Invalidate cached address translations

This instruction is defined by:

  • allOf:

    • Svinval, version >= Svinval@1.0.0

    • H, version >= H@1.0.0

This instruction is included in the following profiles:

  • RVA22S64 (Mandatory)

  • RVA23S64 (Mandatory)

  • RVB23S64 (Mandatory)

Encoding

svg

Assembly format

hinval.gvma rs1, rs2

Synopsis

hinval.gvma has the same semantics as sinval.vma except that it combines with sfence.w.inval and sfence.inval.ir to replace hfence.gvma and uses VMID instead of ASID.

Access

M HS U VS VU

Always

Sometimes

Never

Never

Never

Decode Variables

Bits<5> rs2 = $encoding[24:20];
Bits<5> rs1 = $encoding[19:15];

Execution

  • IDL

XReg gpa = X[rs1];
Bits<VMID_WIDTH> vmid = X[rs2][VMID_WIDTH - 1:0];
if (mode() == PrivilegeMode::U) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
if (CSR[mstatus].TVM == 1 && mode() == PrivilegeMode::S) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
if ((mode() == PrivilegeMode::VS) || (mode() == PrivilegeMode::VU)) {
  raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
}
VmaOrderType vma_type;
vma_type.gstage = true;
if ((rs1 == 0) && (rs2 == 0)) {
  vma_type.global = true;
  invalidate_translations(vma_type);
} else if ((rs1 == 0) && (rs2 != 0)) {
  vma_type.single_vmid = true;
  vma_type.vmid = vmid;
  invalidate_translations(vma_type);
} else if ((rs1 != 0) && (rs2 == 0)) {
  if (canonical_gpaddr?(gpa)) {
    vma_type.single_gpaddr = true;
    vma_type.gpaddr = gpa;
    invalidate_translations(vma_type);
  }
} else {
  if (canonical_gpaddr?(gpa)) {
    vma_type.single_vmid = true;
    vma_type.vmid = vmid;
    vma_type.single_gpaddr = true;
    vma_type.gpaddr = gpa;
    invalidate_translations(vma_type);
  }
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

  • VirtualInstruction