cm.mva01s

Move two s0-s7 registers into a0-a1

This instruction is defined by:

  • anyOf:

    • Zcmp, version >= 0

This instruction is included in the following profiles:

Encoding

svg

Assembly format

cm.mva01s r1s, r2s

Synopsis

This instruction moves r1s' into a0 and r2s' into a1. The execution is atomic, so it is not possible to observe state where only one of a0 or a1 have been updated. The encoding uses sreg number specifiers instead of xreg number specifiers to save encoding space. The mapping between them is specified in the pseudo-code below.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<3> r1s = $encoding[9:7];
Bits<3> r2s = $encoding[4:2];

Execution

  • IDL

if (implemented?(ExtensionName::Zcmp) && (CSR[misa].C == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
XReg xreg1 = (r1s[2:1] > 0) ? {1, 0, r1s[2:0]} : {0, 1, r1s[2:0]};
XReg xreg2 = (r2s[2:1] > 0) ? {1, 0, r2s[2:0]} : {0, 1, r2s[2:0]};
X[10] = X[xreg1];
X[11] = X[xreg2];

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction