c.addiw

Add a sign-extended non-zero immediate

This instruction is defined by:

anyOf:
- C, version >= 0
- Zca, version >= 0

This instruction is included in the following profiles:

Encoding

Assembly format

c.addiw rd, imm

Synopsis

C.ADDIW is an RV64C/RV128C-only instruction that performs the same computation as C.ADDI but produces a 32-bit result, then sign-extends result to 64 bits. C.ADDIW expands into addiw rd, rd, imm. The immediate can be zero for C.ADDIW, where this corresponds to sext.w rd. C.ADDIW is only valid when rd ≠ x0; the code points with rd=x0 are reserved.

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

Bits<6> imm = {$encoding[12], $encoding[6:2]};
Bits<5> rd = $encoding[11:7];

Execution

if (implemented?(ExtensionName::C) && (CSR[misa].C == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
X[rd] = sext((X[rd] + imm), 32);

Exceptions

This instruction may result in the following synchronous exceptions:

IllegalInstruction