c.addw

Add word

This instruction is defined by:

  • anyOf:

    • C, version >= 0

    • Zca, version >= 0

This instruction is included in the following profiles:

Encoding

svg

Assembly format

c.addw rd, rs2

Synopsis

Add the 32-bit values in rs2 from rd, and store the result in rd. The rd and rs2 register indexes should be used as rd+8 and rs2+8 (registers x8-x15). C.ADDW expands into addw rd, rd, rs2.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<3> rs2 = $encoding[4:2];
Bits<3> rd = $encoding[9:7];

Execution

  • IDL

  • Sail

Bits<32> t0 = X[rd + 8][31:0];
Bits<32> t1 = X[rs2 + 8][31:0];
X[rd + 8] = sext(t0 + t1, 31);
{
  let rs1_val = (X(rd+8))[31..0];
  let rs2_val = (X(rs2+8))[31..0];
  let result : bits(32) = match op {
    RISCV_ADDW => rs1_val + rs2_val,
    RISCV_SUBW => rs1_val - rs2_val,
    RISCV_SLLW => rs1_val << (rs2_val[4..0]),
    RISCV_SRLW => rs1_val >> (rs2_val[4..0]),
    RISCV_SRAW => shift_right_arith32(rs1_val, rs2_val[4..0])
  };
  X(rd+8) = sign_extend(result);
  RETIRE_SUCCESS
}