c.sub

Subtract

This instruction is defined by:

  • anyOf:

    • C, version >= 0

    • Zca, version >= 0

This instruction is included in the following profiles:

Encoding

svg

Assembly format

c.sub rd, rs2

Synopsis

Subtract the value in rs2 from rd, and store the result in rd. The rd and rs2 register indexes should be used as rd+8 and rs2+8 (registers x8-x15). C.SUB expands into sub rd, rd, rs2.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<3> rs2 = $encoding[4:2];
Bits<3> rd = $encoding[9:7];

Execution

  • IDL

  • Sail

XReg t0 = X[rd + 8];
XReg t1 = X[rs2 + 8];
X[rd + 8] = t0 - t1;
{
  let rs1_val = X(rd+8);
  let rs2_val = X(rs2+8);
  let result : xlenbits = match op {
    RISCV_ADD  => rs1_val + rs2_val,
    RISCV_SLT  => zero_extend(bool_to_bits(rs1_val <_s rs2_val)),
    RISCV_SLTU => zero_extend(bool_to_bits(rs1_val <_u rs2_val)),
    RISCV_AND  => rs1_val & rs2_val,
    RISCV_OR   => rs1_val | rs2_val,
    RISCV_XOR  => rs1_val ^ rs2_val,
    RISCV_SLL  => if   sizeof(xlen) == 32
                  then rs1_val << (rs2_val[4..0])
                  else rs1_val << (rs2_val[5..0]),
    RISCV_SRL  => if   sizeof(xlen) == 32
                  then rs1_val >> (rs2_val[4..0])
                  else rs1_val >> (rs2_val[5..0]),
    RISCV_SUB  => rs1_val - rs2_val,
    RISCV_SRA  => if   sizeof(xlen) == 32
                  then shift_right_arith32(rs1_val, rs2_val[4..0])
                  else shift_right_arith64(rs1_val, rs2_val[5..0])
  };
  X(rd+8) = result;
  RETIRE_SUCCESS
}