vfdiv.vv
No synopsis available.
This instruction is defined by:
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V, version >= 0
This instruction is included in the following profiles:
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RVA22S64 (Optional)
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RVA22U64 (Optional)
Decode Variables
Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> vs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];
Execution
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IDL
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Sail
{
let rm_3b = fcsr.FRM();
let SEW = get_sew();
let LMUL_pow = get_lmul_pow();
let num_elem = get_num_elem(LMUL_pow, SEW);
if illegal_fp_normal(vd, vm, SEW, rm_3b) then { handle_illegal(); return RETIRE_FAIL };
assert(SEW != 8);
let 'n = num_elem;
let 'm = SEW;
let vm_val : vector('n, dec, bool) = read_vmask(num_elem, vm, 0b00000);
let vs1_val : vector('n, dec, bits('m)) = read_vreg(num_elem, SEW, LMUL_pow, vs1);
let vs2_val : vector('n, dec, bits('m)) = read_vreg(num_elem, SEW, LMUL_pow, vs2);
let vd_val : vector('n, dec, bits('m)) = read_vreg(num_elem, SEW, LMUL_pow, vd);
result : vector('n, dec, bits('m)) = undefined;
mask : vector('n, dec, bool) = undefined;
(result, mask) = init_masked_result(num_elem, SEW, LMUL_pow, vd_val, vm_val);
foreach (i from 0 to (num_elem - 1)) {
if mask[i] then {
result[i] = match funct6 {
FVV_VADD => fp_add(rm_3b, vs2_val[i], vs1_val[i]),
FVV_VSUB => fp_sub(rm_3b, vs2_val[i], vs1_val[i]),
FVV_VMIN => fp_min(vs2_val[i], vs1_val[i]),
FVV_VMAX => fp_max(vs2_val[i], vs1_val[i]),
FVV_VMUL => fp_mul(rm_3b, vs2_val[i], vs1_val[i]),
FVV_VDIV => fp_div(rm_3b, vs2_val[i], vs1_val[i]),
FVV_VSGNJ => [vs1_val[i]['m - 1]] @ vs2_val[i][('m - 2)..0],
FVV_VSGNJN => (0b1 ^ [vs1_val[i]['m - 1]]) @ vs2_val[i][('m - 2)..0],
FVV_VSGNJX => ([vs2_val[i]['m - 1]] ^ [vs1_val[i]['m - 1]]) @ vs2_val[i][('m - 2)..0]
}
}
};
write_vreg(num_elem, SEW, LMUL_pow, vd, result);
vstart = zeros();
RETIRE_SUCCESS
}