sltiu
Set on less than immediate unsigned
This instruction is defined by:
-
I, version >= 0
This instruction is included in the following profiles:
-
MockProfile 64-bit Unpriv (Mandatory)
-
MockProfile 64-bit S-mode (Mandatory)
-
RVA20U64 (Mandatory)
-
RVA22U64 (Mandatory)
-
RVI20U32 (Mandatory)
-
RVI20U64 (Mandatory)
Synopsis
This instruction must have data-independent timing when extension Zkt is enabled. |
Places the value 1 in register rd
if register rs1
is less than the sign-extended immediate
when both are treated as unsigned numbers (i.e., the immediate is first sign-extended to
XLEN bits then treated as an unsigned number), else 0 is written to rd
.
sltiu rd, rs1, 1 sets rd to 1 if rs1 equals zero, otherwise sets rd to 0
(assembler pseudoinstruction SEQZ rd, rs ).
|
Decode Variables
Bits<12> imm = $encoding[31:20];
Bits<5> rs1 = $encoding[19:15];
Bits<5> rd = $encoding[11:7];
Execution
-
IDL
-
Sail
X[rd] = (X[rs1] < imm) ? 1 : 0;
{
let rs1_val = X(rs1);
let immext : xlenbits = sign_extend(imm);
let result : xlenbits = match op {
RISCV_ADDI => rs1_val + immext,
RISCV_SLTI => zero_extend(bool_to_bits(rs1_val <_s immext)),
RISCV_SLTIU => zero_extend(bool_to_bits(rs1_val <_u immext)),
RISCV_ANDI => rs1_val & immext,
RISCV_ORI => rs1_val | immext,
RISCV_XORI => rs1_val ^ immext
};
X(rd) = result;
RETIRE_SUCCESS
}