pmpcfg15

PMP Configuration Register 15

PMP entry configuration

Attributes

Defining Extension

Smpmp, version >= 0

CSR Address

0x3af

Length

32-bit

64-bit

Privilege Mode

Format

This CSR format changes dynamically.

Field Summary

Name Location Type Reset Value

pmp60cfg

7:0

RW-R

UNDEFINED_LEGAL

pmp61cfg

15:8

RW-R

UNDEFINED_LEGAL

pmp62cfg

23:16

RW-R

UNDEFINED_LEGAL

pmp63cfg

31:24

RW-R

UNDEFINED_LEGAL

Fields

`pmp60cfg`

Location

7:0

Description

PMP configuration for entry 60

The bits are as follows:

[separator="!",%autowidth]
!===
! Name ! Location ! Description

h! L ! 7 ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
h! - ! 6:5 ! Reserved Writes shall be ignored.
h! A ! 4:3
a! Address matching mode. One of:

[when="PMP_GRANULARITY < 2"]

OFF (0) - Null region (disabled)
TOR (1) - Top of range
NA4 (2) - Naturally aligned four-byte region
NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"]
OFF (0) - Null region (disabled)
TOR (1) - Top of range
NAPOT (3) - Natrually aligned power of two

[when="PMP_GRANULARITY >= 2"]
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

h! X ! 2 ! When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.
h! W ! 1 ! When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.
h! R ! 0 ! When clear, loads cause an Access Fault for the matching region and privilege mode.
!===

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Reset value

UNDEFINED_LEGAL

`pmp61cfg`

Location

15:8

Description

PMP configuration for entry 61

The bits are as follows:

[separator="!",%autowidth]
!===
! Name ! Location ! Description

h! L ! 15 ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
h! - ! 14:13 ! Reserved Writes shall be ignored.
h! A ! 12:11
a! Address matching mode. One of:

[when="PMP_GRANULARITY < 2"]

OFF (0) - Null region (disabled)
TOR (1) - Top of range
NA4 (2) - Naturally aligned four-byte region
NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"]
OFF (0) - Null region (disabled)
TOR (1) - Top of range
NAPOT (3) - Natrually aligned power of two

[when="PMP_GRANULARITY >= 2"]
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

h! X ! 10 ! When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.
h! W ! 9 ! When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.
h! R ! 8 ! When clear, loads cause an Access Fault for the matching region and privilege mode.
!===

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Reset value

UNDEFINED_LEGAL

`pmp62cfg`

Location

23:16

Description

PMP configuration for entry 62

The bits are as follows:

[separator="!",%autowidth]
!===
! Name ! Location ! Description

h! L ! 23 ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
h! - ! 22:21 ! Reserved Writes shall be ignored.
h! A ! 20:19
a! Address matching mode. One of:

[when="PMP_GRANULARITY < 2"]

OFF (0) - Null region (disabled)
TOR (1) - Top of range
NA4 (2) - Naturally aligned four-byte region
NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"]
OFF (0) - Null region (disabled)
TOR (1) - Top of range
NAPOT (3) - Natrually aligned power of two

[when="PMP_GRANULARITY >= 2"]
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

h! X ! 18 ! When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.
h! W ! 17 ! When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.
h! R ! 16 ! When clear, loads cause an Access Fault for the matching region and privilege mode.
!===

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Reset value

UNDEFINED_LEGAL

`pmp63cfg`

Location

31:24

Description

PMP configuration for entry 63

The bits are as follows:

[separator="!",%autowidth]
!===
! Name ! Location ! Description

h! L ! 31 ! Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
h! - ! 30:29 ! Reserved Writes shall be ignored.
h! A ! 28:27
a! Address matching mode. One of:

[when="PMP_GRANULARITY < 2"]

OFF (0) - Null region (disabled)
TOR (1) - Top of range
NA4 (2) - Naturally aligned four-byte region
NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"]
OFF (0) - Null region (disabled)
TOR (1) - Top of range
NAPOT (3) - Natrually aligned power of two

[when="PMP_GRANULARITY >= 2"]
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

h! X ! 26 ! When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.
h! W ! 25 ! When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.
h! R ! 24 ! When clear, loads cause an Access Fault for the matching region and privilege mode.
!===

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Reset value

UNDEFINED_LEGAL

Software write

This CSR may store a value that is different from what software attempts to write.

When a software write occurs (e.g., through csrrw), the following determines the written value:

pmp60cfg = if ((CSR[pmpcfg15].pmp60cfg & 0x80) == 0) {
  # entry is not locked
  if (!(((csr_value.pmp60cfg & 0x1) == 0) && ((csr_value.pmp60cfg & 0x2) == 0x2))) {
    # not R = 0, W =1, which is reserved
    if ((PMP_GRANULARITY < 2) ||
        ((csr_value.pmp60cfg & 0x18) != 0x10)) {
      # NA4 is not allowed when PMP granularity is larger than 4 bytes
      return csr_value.pmp60cfg;
    }
  }
}
# fall through: keep old value
return CSR[pmpcfg15].pmp60cfg;

pmp61cfg = if ((CSR[pmpcfg15].pmp61cfg & 0x80) == 0) {
  # entry is not locked
  if (!(((csr_value.pmp61cfg & 0x1) == 0) && ((csr_value.pmp61cfg & 0x2) == 0x2))) {
    # not R = 0, W =1, which is reserved
    if ((PMP_GRANULARITY < 2) ||
        ((csr_value.pmp61cfg & 0x18) != 0x10)) {
      # NA4 is not allowed when PMP granularity is larger than 4 bytes
      return csr_value.pmp61cfg;
    }
  }
}
# fall through: keep old value
return CSR[pmpcfg15].pmp61cfg;

pmp62cfg = if ((CSR[pmpcfg15].pmp62cfg & 0x80) == 0) {
  # entry is not locked
  if (!(((csr_value.pmp62cfg & 0x1) == 0) && ((csr_value.pmp62cfg & 0x2) == 0x2))) {
    # not R = 0, W =1, which is reserved
    if ((PMP_GRANULARITY < 2) ||
        ((csr_value.pmp62cfg & 0x18) != 0x10)) {
      # NA4 is not allowed when PMP granularity is larger than 4 bytes
      return csr_value.pmp62cfg;
    }
  }
}
# fall through: keep old value
return CSR[pmpcfg15].pmp62cfg;

pmp63cfg = if ((CSR[pmpcfg15].pmp63cfg & 0x80) == 0) {
  # entry is not locked
  if (!(((csr_value.pmp63cfg & 0x1) == 0) && ((csr_value.pmp63cfg & 0x2) == 0x2))) {
    # not R = 0, W =1, which is reserved
    if ((PMP_GRANULARITY < 2) ||
        ((csr_value.pmp63cfg & 0x18) != 0x10)) {
      # NA4 is not allowed when PMP granularity is larger than 4 bytes
      return csr_value.pmp63cfg;
    }
  }
}
# fall through: keep old value
return CSR[pmpcfg15].pmp63cfg;