fsgnjn.s
Single-precision sign inject negate
This instruction is defined by:
-
F, version >= 0
This instruction is included in the following profiles:
-
RVA20U64 (Mandatory)
-
RVA22U64 (Mandatory)
-
RVI20U32 (Optional)
-
RVI20U64 (Optional)
Synopsis
| This instruction must have data-independent timing when extension Zkt is enabled. |
Writes fd with the opposite of the sign bit of fs2 and the exponent and mantissa of fs1.
Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs.
Decode Variables
Bits<5> fs2 = $encoding[24:20];
Bits<5> fs1 = $encoding[19:15];
Bits<5> fd = $encoding[11:7];Execution
-
IDL
-
Sail
check_f_ok($encoding);
Bits<32> sp_value = {~f[fs2][31], f[fs1][30:0]};
if (implemented?(ExtensionName::D)) {
f[fd] = nan_box<32, 64>(sp_value);
} else {
f[fd] = sp_value;
}
mark_f_state_dirty();{
let rs1_val_S = F_or_X_S(rs1);
let rs2_val_S = F_or_X_S(rs2);
let (fflags, rd_val) : (bits_fflags, bool) =
riscv_f32Le (rs1_val_S, rs2_val_S);
accrue_fflags(fflags);
X(rd) = zero_extend(bool_to_bits(rd_val));
RETIRE_SUCCESS
}