mstatus
Machine Status
The mstatus register tracks and controls the hart’s current operating state.
Attributes
Defining Extension |
|
||||
---|---|---|---|---|---|
CSR Address |
0x300 |
||||
Length |
|
||||
Privilege Mode |
M |
Field Summary
Name | Location | Type | Reset Value | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
63 |
|
|
|||||||||||||||||
39 |
RW-H |
UNDEFINED_LEGAL |
|||||||||||||||||
38 |
RW-H |
0 |
|||||||||||||||||
37 |
|
|
|||||||||||||||||
36 |
|
|
|||||||||||||||||
35:34 |
|
UNDEFINED_LEGAL |
|||||||||||||||||
33:32 |
|
|
|||||||||||||||||
22 |
RW |
UNDEFINED_LEGAL |
|||||||||||||||||
21 |
RW |
UNDEFINED_LEGAL |
|||||||||||||||||
20 |
|
|
|||||||||||||||||
19 |
RW |
UNDEFINED_LEGAL |
|||||||||||||||||
18 |
|
|
|||||||||||||||||
17 |
|
0 |
|||||||||||||||||
16:15 |
RO |
0 |
|||||||||||||||||
14:13 |
|
|
|||||||||||||||||
12:11 |
RW-H |
UNDEFINED_LEGAL |
|||||||||||||||||
10:9 |
RW-H |
UNDEFINED_LEGAL |
|||||||||||||||||
8 |
RW-H |
UNDEFINED_LEGAL |
|||||||||||||||||
7 |
RW-H |
UNDEFINED_LEGAL |
|||||||||||||||||
6 |
|
|
|||||||||||||||||
5 |
|
|
|||||||||||||||||
3 |
RW-H |
0 |
|||||||||||||||||
1 |
|
|
Software write
This CSR may store a value that is different from what software attempts to write.
When a software write occurs (e.g., through csrrw), the following determines the written value:
SD = csr_value.SD MPV = csr_value.MPV GVA = csr_value.GVA MBE = csr_value.MBE SBE = csr_value.SBE SXL = if (csr_value.SXL < csr_value.UXL) { return UNDEFINED_LEGAL_DETERMINISTIC; } else if (csr_value.SXL > 1) { # SXL != [0, 1] is not defined (2 reserved for RV128, but that isn't ratified) return UNDEFINED_LEGAL_DETERMINISTIC; } else { return csr_value.SXL; } UXL = if (csr_value.SXL < csr_value.UXL) { return UNDEFINED_LEGAL_DETERMINISTIC; } else if (csr_value.UXL > 1) { # UXL != [0, 1] is not defined (2 reserved for RV128, but that isn't ratified) return UNDEFINED_LEGAL_DETERMINISTIC; } else { return csr_value.UXL; } TSR = csr_value.TSR TW = csr_value.TW TVM = if (CSR[misa].S == 1'b0) { return 0; } else if (MSTATUS_TVM_IMPLEMENTED) { return csr_value.TVM; } else { return 0; } MXR = csr_value.MXR SUM = csr_value.SUM MPRV = csr_value.MPRV XS = csr_value.XS FS = if (CSR[misa].F == 1'b1){ return ary_includes?<$array_size(MSTATUS_FS_LEGAL_VALUES), 2>(MSTATUS_FS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; } else if ((CSR[misa].S == 1'b0) && (CSR[misa].F == 1'b0)) { # must be read-only-0 return 0; } else { # there will be no hardware update in this case because we know the F extension isn't implemented return ary_includes?<$array_size(MSTATUS_FS_LEGAL_VALUES), 2>(MSTATUS_FS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; } MPP = if (csr_value.MPP == 2'b01 && !implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL_DETERMINISTIC; } else if (csr_value.MPP == 2'b00 && !implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL_DETERMINISTIC; } else if (csr_value.MPP == 2'b10) { # never a valid value return UNDEFINED_LEGAL_DETERMINISTIC; } else { return csr_value.MPP; } VS = if (CSR[misa].V == 1'b1){ return ary_includes?<$array_size(MSTATUS_VS_LEGAL_VALUES), 2>(MSTATUS_VS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; } else if ((CSR[misa].S == 1'b0) && (CSR[misa].V == 1'b0)) { # must be read-only-0 return 0; } else { # there will be no hardware update in this case because we know the V extension isn't implemented return ary_includes?<$array_size(MSTATUS_VS_LEGAL_VALUES), 2>(MSTATUS_VS_LEGAL_VALUES, csr_value.FS) ? csr_value.FS : UNDEFINED_LEGAL_DETERMINISTIC; } SPP = if (csr_value.SPP == 2'b10) { return UNDEFINED_LEGAL_DETERMINISTIC; } else { return csr_value.SPP; } MPIE = csr_value.MPIE UBE = csr_value.UBE SPIE = csr_value.SPIE MIE = csr_value.MIE SIE = csr_value.SIE