instreth
Instructions retired counter, high bits
Alias for high bits of M-mode CSR minstret[63:32].
Privilege mode access is controlled with mcounteren.IR, scounteren.IR, and hcounteren.IR as follows:
instret behavior |
||||||
|---|---|---|---|---|---|---|
S-mode |
U-mode |
VS-mode |
VU-mode |
|||
0 |
- |
- |
|
|
|
|
1 |
0 |
0 |
read-only |
|
|
|
1 |
1 |
0 |
read-only |
read-only |
|
|
1 |
0 |
1 |
read-only |
|
read-only |
|
1 |
1 |
1 |
read-only |
read-only |
read-only |
read-only |
Software read
This CSR may return a value that is different from what is stored in hardware.
if (mode() == PrivilegeMode::S) {
if (CSR[mcounteren].IR == 1'b0) {
raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
} else if (mode() == PrivilegeMode::U) {
if (CSR[misa].S == 1'b1) {
if ((CSR[mcounteren].IR & CSR[scounteren].IR) == 1'b0) {
raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
} else if (CSR[mcounteren].IR == 1'b0) {
raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
} else if (mode() == PrivilegeMode::VS) {
if (CSR[hcounteren].IR == 1'b0 && CSR[mcounteren] == 1'b1) {
raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
} else if (CSR[mcounteren].IR == 1'b0) {
raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
} else if (mode() == PrivilegeMode::VU) {
if (CSR[hcounteren].IR & CSR[scounteren].IR) == 1'b0) && (CSR[mcounteren].IR == 1'b1 {
raise(ExceptionCode::VirtualInstruction, mode(), $encoding);
} else if (CSR[mcounteren].IR == 1'b0) {
raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
}
return read_mcycle();