"Zawrs" Extension for Wait-on-Reservation-Set instructions, Version 1.01
The Zawrs extension defines a pair of instructions to be used in polling loops that allows a core to enter a low-power state and wait on a store to a memory location. Waiting for a memory location to be updated is a common pattern in many use cases such as:
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Contenders for a lock waiting for the lock variable to be updated.
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Consumers waiting on the tail of an empty queue for the producer to queue work/data. The producer may be code executing on a RISC-V hart, an accelerator device, an external I/O agent.
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Code waiting on a flag to be set in memory indicative of an event occurring. For example, software on a RISC-V hart may wait on a "done" flag to be set in memory by an accelerator device indicating completion of a job previously submitted to the device.
Such use cases involve polling on memory locations, and such busy loops can be a
wasteful expenditure of energy. To mitigate the wasteful looping in such usages,
a WRS.NTO (WRS-with-no-timeout) instruction is provided. Instead of polling
for a store to a specific memory location, software registers a reservation set
that includes all the bytes of the memory location using the LR instruction.
Then a subsequent WRS.NTO instruction would cause the hart to temporarily
stall execution in a low-power state until a store occurs to the reservation set
or an interrupt is observed.
Sometimes the program waiting on a memory update may also need to carry out a
task at a future time or otherwise place an upper bound on the wait. To support
such use cases a second instruction WRS.STO (WRS-with-short-timeout) is
provided that works like WRS.NTO but bounds the stall duration to an
implementation-define short timeout such that the stall is terminated on the
timeout if no other conditions have occurred to terminate the stall. The
program using this instruction may then determine if its deadline has been
reached.
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The instructions in the Zawrs extension are only useful in conjunction with the LR instruction, which is provided by the Zalrsc component of the A extension. |
Wait-on-Reservation-Set Instructions
The WRS.NTO and WRS.STO instructions cause the hart to temporarily stall
execution in a low-power state as long as the reservation set is valid and no
pending interrupts, even if disabled, are observed. For WRS.STO the stall
duration is bounded by an implementation defined short timeout. These
instructions are available in all privilege modes. These instructions are not
supported in a constrained LR/SC loop.
Hart execution may be stalled while the following conditions are all satisfied:
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The reservation set is valid
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If
WRS.STO, a "short" duration since start of stall has not elapsed -
No pending interrupt is observed (see the rules below)
While stalled, an implementation is permitted to occasionally terminate the stall and complete execution for any reason.
WRS.NTO and WRS.STO instructions follow the rules of the WFI instruction
for resuming execution on a pending interrupt.
When the TW (Timeout Wait) bit in mstatus is set and WRS.NTO is executed
in any privilege mode other than M mode, and it does not complete within an
implementation-specific bounded time limit, the WRS.NTO instruction will cause
an illegal instruction exception.
When executing in VS or VU mode, if the VTW bit is set in hstatus, the
TW bit in mstatus is clear, and the WRS.NTO does not complete within an
implementation-specific bounded time limit, the WRS.NTO instruction will cause
a virtual instruction exception.
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Since the The duration of a
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