hedeleg

Hypervisor Exception Delegation

Controls exception delegation from HS-mode to VS-mode.

By default, all traps at any privilege level are handled in M-mode, though M-mode usually uses the medeleg and mideleg CSRs to delegate some traps to HS-mode. The hedeleg and hideleg CSRs allow these traps to be further delegated to a VS-mode guest; their layout is the same as medeleg and mideleg.

A synchronous trap that has been delegated to HS-mode (using medeleg) is further delegated to VS-mode if V=1 before the trap and the corresponding hedeleg bit is set. Each bit of hedeleg shall be either writable or read-only zero. Many bits of hedeleg are required specifically to be writable or zero. Bit 0, corresponding to instruction address misaligned exceptions, must be writable if IALIGN=32.

Requiring that certain bits of hedeleg be writable reduces some of the burden on a hypervisor to handle variations of implementation.

When XLEN=32, hedelegh is a 32-bit read/write register that aliases bits 63:32 of hedeleg. Register hedelegh does not exist when XLEN=64.

Attributes

Defining Extension	H, version >= 0
CSR Address	0x602
Length	64-bit
Privilege Mode	S

Defining Extension

H, version >= 0

CSR Address

0x602

Length

64-bit

Privilege Mode

Format

Figure 1. hedeleg format

Field Summary

Name Location Type Reset Value

Name	Location	Type	Reset Value
`IAM`	0	RW	UNDEFINED_LEGAL
`IAF`	1	RW	UNDEFINED_LEGAL
`II`	2	RW	UNDEFINED_LEGAL
xref:exts:B.adoc#B-def[B]	3	RW	UNDEFINED_LEGAL
`LAM`	4	RW	UNDEFINED_LEGAL
`LAF`	5	RW	UNDEFINED_LEGAL
`SAM`	6	RW	UNDEFINED_LEGAL
`SAF`	7	RW	UNDEFINED_LEGAL
`EU`	8	RW	UNDEFINED_LEGAL
`ES`	9	RO	0
`EVS`	10	RO	0
`EM`	11	RO	0
`IPF`	12	RW	UNDEFINED_LEGAL
`LPF`	13	RW	UNDEFINED_LEGAL
`SPF`	15	RW	UNDEFINED_LEGAL
`IGPF`	20	RO	0
`LGPF`	21	RO	0
`VI`	22	RO	0
`SGPF`	23	RO	0

IAM

UNDEFINED_LEGAL

IAF

UNDEFINED_LEGAL

II

UNDEFINED_LEGAL

xref:exts:B.adoc#B-def[B]

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

UNDEFINED_LEGAL

Fields

`IAM`

Location: 0
Description: Instruction Address Misaligned

Controls delegation of Instruction Address Misaligned exceptions to VS-mode.

See medeleg.IAM for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`IAF`

Location: 1
Description: Instruction Access Fault

Controls delegation of Instruction Access Fault exceptions to VS-mode.

See medeleg.IAF for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`II`

Location: 2
Description: Illegal Instruction

Controls delegation of Illegal Instruction exceptions to VS-mode.

See medeleg.II for details.
Type: RW
Reset value: UNDEFINED_LEGAL

B

Location: 3
Description: Breakpoint

Controls delegation of Breakpoint exceptions to VS-mode.

See medeleg.B for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`LAM`

Location: 4
Description: Load Address Misaligned

Controls delegation of Load Address Misaligned exceptions to VS-mode.

See medeleg.LAM for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`LAF`

Location: 5
Description: Load Access Fault

Controls delegation of Load Access Fault exceptions to VS-mode.

See medeleg.LAF for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`SAM`

Location: 6
Description: Store/AMO Address Misaligned

Controls delegation of Store/AMO Address Misaligned exceptions to VS-mode.

See medeleg.SAM for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`SAF`

Location: 7
Description: Store/AMO Access Fault

Controls delegation of Store/AMO Access Fault exceptions to VS-mode.

See medeleg.SAF for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`EU`

Location: 8
Description: Environment Call from VU-mode

Controls delegation of Enviornment Call from VU-mode exceptions to VS-mode.

See medeleg.EU for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`ES`

Location: 9
Description: Environment Call from HS-mode

Enviornment Call from HS-mode exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.ES for details.
Type: RO
Reset value: 0

`EVS`

Location: 10
Description: Environment Call from VS-mode

Enviornment Call from VS-mode exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.EVS for details.
Type: RO
Reset value: 0

`EM`

Location: 11
Description: Environment Call from M-mode

Enviornment Call from M-mode exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.EM for details.
Type: RO
Reset value: 0

`IPF`

Location: 12
Description: Instruction Page Fault

Controls delegation of Instruction Page Fault exceptions to VS-mode.

See medeleg.IPF for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`LPF`

Location: 13
Description: Load Page Fault

Controls delegation of Load Page Fault exceptions to VS-mode.

See medeleg.LPF for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`SPF`

Location: 15
Description: Store/AMO Page Fault

Controls delegation of Store/AMO Page Fault exceptions to VS-mode.

See medeleg.SPF for details.
Type: RW
Reset value: UNDEFINED_LEGAL

`IGPF`

Location: 20
Description: Instruction Guest Page Fault

Instruction Guest Page Fault exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.IGPF for details.
Type: RO
Reset value: 0

`LGPF`

Location: 21
Description: Load Guest Page Fault

Load Guest Page Fault exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.LGPF for details.
Type: RO
Reset value: 0

`VI`

Location: 22
Description: Virtual Instruction

Virtual Instruction exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.VI for details.
Type: RO
Reset value: 0

`SGPF`

Location: 23
Description: Store/AMO Guest Page Fault

Store/AMO Guest Page Fault exceptions cannot be delegated to VS-mode,
so this field is read-only 0.

See medeleg.SGPF for details.
Type: RO
Reset value: 0