fmv.w.x

Single-precision floating-point move from integer

This instruction is defined by:

F, version >= 0

This instruction is included in the following profiles:

RVA20S64 (Mandatory)
RVA20U64 (Mandatory)
RVA22S64 (Mandatory)
RVA22U64 (Mandatory)

Encoding

Assembly format

fmv.w.x fd, rs1

Synopsis

This instruction must have data-independent timing when extension Zkt is enabled.

Moves the single-precision value encoded in IEEE 754-2008 standard encoding from the lower 32 bits of integer register rs1 to the floating-point register fd. The bits are not modified in the transfer, and in particular, the payloads of non-canonical NaNs are preserved.

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

Bits<5> rs1 = $encoding[19:15];
Bits<5> fd = $encoding[11:7];

Execution

IDL
Sail

check_f_ok($encoding);
Bits<32> sp_value = X[rs1][31:0];
if (implemented?(ExtensionName::D)) {
  f[fd] = nan_box<32, 64>(sp_value);
} else {
  f[fd] = sp_value;
}
mark_f_state_dirty();

{
  let rs1_val_X            = X(rs1);
  let rd_val_S             = rs1_val_X [31..0];
  F(rd) = nan_box (rd_val_S);
  RETIRE_SUCCESS
}

Exceptions

This instruction may result in the following synchronous exceptions:

IllegalInstruction