Untitled :: RISC-V ISA Manual

0.93

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andn

Synopsis: AND with inverted operand
Mnemonic: andn rd, rs1, rs2
Encoding

Description: This instruction performs the bitwise logical AND operation between rs1 and the bitwise inversion of rs2.
Operation

X(rd) = X(rs1) & ~X(rs2);

Included in

Extension	Minimum version	Lifecycle state
Zbb (Basic bit-manipulation)	0.93	Frozen
Zbkb (Bit-manipulation for Cryptography)	v0.9.4	Frozen

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v0.9.4

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bclr

Synopsis: Single-Bit Clear (Register)
Mnemonic: bclr rd, rs1, rs2
Encoding

Description: This instruction returns rs1 with a single bit cleared at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2.
Operation

let index = X(rs2) & (XLEN - 1);
X(rd) = X(rs1) & ~(1 << index)

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bclri

Synopsis: Single-Bit Clear (Immediate)
Mnemonic: bclri rd, rs1, shamt
Encoding (RV32)

Encoding (RV64)

Description: This instruction returns rs1 with a single bit cleared at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved.
Operation

let index = shamt & (XLEN - 1);
X(rd) = X(rs1) & ~(1 << index)

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bext

Synopsis: Single-Bit Extract (Register)
Mnemonic: bext rd, rs1, rs2
Encoding

Description: This instruction returns a single bit extracted from rs1 at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2.
Operation

let index = X(rs2) & (XLEN - 1);
X(rd) = (X(rs1) >> index) & 1;

Included in

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bexti

Synopsis: Single-Bit Extract (Immediate)
Mnemonic: bexti rd, rs1, shamt
Encoding (RV32)

Encoding (RV64)

Description: This instruction returns a single bit extracted from rs1 at the index specified in rs2. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved.
Operation

let index = shamt & (XLEN - 1);
X(rd) = (X(rs1) >> index) & 1;

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binv

Synopsis: Single-Bit Invert (Register)
Mnemonic: binv rd, rs1, rs2
Encoding

Description: This instruction returns rs1 with a single bit inverted at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2.
Operation

let index = X(rs2) & (XLEN - 1);
X(rd) = X(rs1) ^ (1 << index)

Included in

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binvi

Synopsis: Single-Bit Invert (Immediate)
Mnemonic: binvi rd, rs1, shamt
Encoding (RV32)

Encoding (RV64)

Description: This instruction returns rs1 with a single bit inverted at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved.
Operation

let index = shamt & (XLEN - 1);
X(rd) = X(rs1) ^ (1 << index)

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bset

Synopsis: Single-Bit Set (Register)
Mnemonic: bset rd, rs1,rs2
Encoding

Description: This instruction returns rs1 with a single bit set at the index specified in rs2. The index is read from the lower log2(XLEN) bits of rs2.
Operation

let index = X(rs2) & (XLEN - 1);
X(rd) = X(rs1) | (1 << index)

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bseti

Synopsis: Single-Bit Set (Immediate)
Mnemonic: bseti rd, rs1,shamt
Encoding (RV32)

Encoding (RV64)

Description: This instruction returns rs1 with a single bit set at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved.
Operation

let index = shamt & (XLEN - 1);
X(rd) = X(rs1) | (1 << index)

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clmul

Synopsis: Carry-less multiply (low-part)
Mnemonic: clmul rd, rs1, rs2
Encoding

Description: clmul produces the lower half of the 2·XLEN carry-less product.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);
let output : xlenbits = 0;

foreach (i from 0 to (xlen - 1) by 1) {
   output = if   ((rs2_val >> i) & 1)
            then output ^ (rs1_val << i);
            else output;
}

X[rd] = output

Included in

Extension	Minimum version	Lifecycle state
Zbc (Carry-less multiplication)	0.93	Frozen
Zbkc (Carry-less multiplication for Cryptography)	v0.9.4	Frozen

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clmulh

Synopsis: Carry-less multiply (high-part)
Mnemonic: clmulh rd, rs1, rs2
Encoding

Description: clmulh produces the upper half of the 2·XLEN carry-less product.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);
let output : xlenbits = 0;

foreach (i from 1 to xlen by 1) {
   output = if   ((rs2_val >> i) & 1)
            then output ^ (rs1_val >> (xlen - i));
            else output;
}

X[rd] = output

Included in

Extension	Minimum version	Lifecycle state
Zbc (Carry-less multiplication)	0.93	Frozen
Zbkc (Carry-less multiplication for Cryptography)	v0.9.4	Frozen

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Zbc (Carry-less multiplication)

0.93

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v0.9.4

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clmulr

Synopsis: Carry-less multiply (reversed)
Mnemonic: clmulr rd, rs1, rs2
Encoding

Description: clmulr produces bits 2·XLEN−2:XLEN-1 of the 2·XLEN carry-less product.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);
let output : xlenbits = 0;

foreach (i from 0 to (xlen - 1) by 1) {
   output = if   ((rs2_val >> i) & 1)
            then output ^ (rs1_val >> (xlen - i - 1));
            else output;
}

X[rd] = output

Note

The clmulr instruction is used to accelerate CRC calculations. The r in the instruction’s mnemonic stands for reversed, as the instruction is equivalent to bit-reversing the inputs, performing a clmul, then bit-reversing the output.

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Zbc (Carry-less multiplication)

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clz

Synopsis: Count leading zero bits
Mnemonic: clz rd, rs
Encoding

Description: This instruction counts the number of 0’s before the first 1, starting at the most-significant bit (i.e., XLEN-1) and progressing to bit 0. Accordingly, if the input is 0, the output is XLEN, and if the most-significant bit of the input is a 1, the output is 0.
Operation

val HighestSetBit : forall ('N : Int), 'N >= 0. bits('N) -> int

function HighestSetBit x = {
  foreach (i from (xlen - 1) to 0 by 1 in dec)
    if [x[i]] == 0b1 then return(i) else ();
  return -1;
}

let rs = X(rs);
X[rd] = (xlen - 1) - HighestSetBit(rs);

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clzw

Synopsis: Count leading zero bits in word
Mnemonic: clzw rd, rs
Encoding

Description: This instruction counts the number of 0’s before the first 1 starting at bit 31 and progressing to bit 0. Accordingly, if the least-significant word is 0, the output is 32, and if the most-significant bit of the word (i.e., bit 31) is a 1, the output is 0.
Operation

val HighestSetBit32 : forall ('N : Int), 'N >= 0. bits('N) -> int

function HighestSetBit32 x = {
  foreach (i from 31 to 0 by 1 in dec)
    if [x[i]] == 0b1 then return(i) else ();
  return -1;
}

let rs = X(rs);
X[rd] = 31 - HighestSetBit(rs);

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cpop

Synopsis: Count set bits
Mnemonic: cpop rd, rs
Encoding

Description: This instructions counts the number of 1’s (i.e., set bits) in the source register.
Operation

let bitcount = 0;
let rs = X(rs);

foreach (i from 0 to (xlen - 1) in inc)
    if rs[i] == 0b1 then bitcount = bitcount + 1 else ();

X[rd] = bitcount

Software Hint

This operations is known as population count, popcount, sideways sum, bit summation, or Hamming weight.

The GCC builtin function __builtin_popcount (unsigned int x) is implemented by cpop on RV32 and by cpopw on RV64. The GCC builtin function __builtin_popcountl (unsigned long x) for LP64 is implemented by cpop on RV64.

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cpopw

Synopsis: Count set bits in word
Mnemonic: cpopw rd, rs
Encoding

Description: This instructions counts the number of 1’s (i.e., set bits) in the least-significant word of the source register.
Operation

let bitcount = 0;
let val = X(rs);

foreach (i from 0 to 31 in inc)
    if val[i] == 0b1 then bitcount = bitcount + 1 else ();

X[rd] = bitcount

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ctz

Synopsis: Count trailing zeros
Mnemonic: ctz rd, rs
Encoding

Description: This instruction counts the number of 0’s before the first 1, starting at the least-significant bit (i.e., 0) and progressing to the most-significant bit (i.e., XLEN-1). Accordingly, if the input is 0, the output is XLEN, and if the least-significant bit of the input is a 1, the output is 0.
Operation

val LowestSetBit : forall ('N : Int), 'N >= 0. bits('N) -> int

function LowestSetBit x = {
  foreach (i from 0 to (xlen - 1) by 1 in dec)
    if [x[i]] == 0b1 then return(i) else ();
  return xlen;
}

let rs = X(rs);
X[rd] = LowestSetBit(rs);

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ctzw

Synopsis: Count trailing zero bits in word
Mnemonic: ctzw rd, rs
Encoding

Description: This instruction counts the number of 0’s before the first 1, starting at the least-significant bit (i.e., 0) and progressing to the most-significant bit of the least-significant word (i.e., 31). Accordingly, if the least-significant word is 0, the output is 32, and if the least-significant bit of the input is a 1, the output is 0.
Operation

val LowestSetBit32 : forall ('N : Int), 'N >= 0. bits('N) -> int

function LowestSetBit32 x = {
  foreach (i from 0 to 31 by 1 in dec)
    if [x[i]] == 0b1 then return(i) else ();
  return 32;
}

let rs = X(rs);
X[rd] = LowestSetBit32(rs);

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max

Synopsis: Maximum
Mnemonic: max rd, rs1, rs2
Encoding

Description: This instruction returns the larger of two signed integers.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);

let result = if   rs1_val <_s rs2_val
             then rs2_val
             else rs1_val;

X(rd) = result;

Software Hint

Calculating the absolute value of a signed integer can be performed using the following sequence: neg rD,rS followed by max rD,rS,rD. When using this common sequence, it is suggested that they are scheduled with no intervening instructions so that implementations that are so optimized can fuse them together.

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maxu

Synopsis: Unsigned maximum
Mnemonic: maxu rd, rs1, rs2
Encoding

Description: This instruction returns the larger of two unsigned integers.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);

let result = if   rs1_val <_u rs2_val
             then rs2_val
             else rs1_val;

X(rd) = result;

Included in

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min

Synopsis: Minimum
Mnemonic: min rd, rs1, rs2
Encoding

Description: This instruction returns the smaller of two signed integers.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);

let result = if   rs1_val <_s rs2_val
             then rs1_val
             else rs2_val;

X(rd) = result;

Included in

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minu

Synopsis: Unsigned minimum
Mnemonic: minu rd, rs1, rs2
Encoding

Description: This instruction returns the smaller of two unsigned integers.
Operation

let rs1_val = X(rs1);
let rs2_val = X(rs2);

let result = if   rs1_val <_u rs2_val
             then rs1_val
             else rs2_val;

X(rd) = result;

Included in

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orc.b

Synopsis: Bitwise OR-Combine, byte granule
Mnemonic: orc.b rd, rs
Encoding

Description: Combines the bits within each byte using bitwise logical OR. This sets the bits of each byte in the result rd to all zeros if no bit within the respective byte of rs is set, or to all ones if any bit within the respective byte of rs is set.
Operation

let input = X(rs);
let output : xlenbits = 0;

foreach (i from 0 to (xlen - 8) by 8) {
   output[(i + 7)..i] = if   input[(i + 7)..i] == 0
                        then 0b00000000
                        else 0b11111111;
}

X[rd] = output;

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orn

Synopsis: OR with inverted operand
Mnemonic: orn rd, rs1, rs2
Encoding

Description: This instruction performs the bitwise logical OR operation between rs1 and the bitwise inversion of rs2.
Operation

X(rd) = X(rs1) | ~X(rs2);

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pack

Synopsis: Pack the low halves of rs1 and rs2 into rd.
Mnemonic: pack rd, rs1, rs2
Encoding

Description: The pack instruction packs the XLEN/2-bit lower halves of rs1 and rs2 into rd, with rs1 in the lower half and rs2 in the upper half.
Operation

let lo_half : bits(xlen/2) = X(rs1)[xlen/2-1..0];
let hi_half : bits(xlen/2) = X(rs2)[xlen/2-1..0];
X(rd) = EXTZ(hi_half @ lo_half);

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packh

Synopsis: Pack the low bytes of rs1 and rs2 into rd.
Mnemonic: packh rd, rs1, rs2
Encoding

Description: And the packh instruction packs the least-significant bytes of rs1 and rs2 into the 16 least-significant bits of rd, zero extending the rest of rd.
Operation

let lo_half : bits(8) = X(rs1)[7..0];
let hi_half : bits(8) = X(rs2)[7..0];
X(rd) = EXTZ(hi_half @ lo_half);

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packw

Synopsis: Pack the low 16-bits of rs1 and rs2 into rd on RV64.
Mnemonic: packw rd, rs1, rs2
Encoding

Description: This instruction packs the low 16 bits of rs1 and rs2 into the 32 least-significant bits of rd, sign extending the 32-bit result to the rest of rd. This instruction only exists on RV64 based systems.
Operation

let lo_half : bits(16) = X(rs1)[15..0];
let hi_half : bits(16) = X(rs2)[15..0];
X(rd) = EXTS(hi_half @ lo_half);

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rev8

Synopsis: Byte-reverse register
Mnemonic: rev8 rd, rs
Encoding (RV32)

Encoding (RV64)

Description: This instruction reverses the order of the bytes in rs.
Operation

let input = X(rs);
let output : xlenbits = 0;
let j = xlen - 1;

foreach (i from 0 to (xlen - 8) by 8) {
   output[i..(i + 7)] = input[(j - 7)..j];
   j = j - 8;
}

X[rd] = output

Note

The rev8 mnemonic corresponds to different instruction encodings in RV32 and RV64.

Software Hint

The byte-reverse operation is only available for the full register width. To emulate word-sized and halfword-sized byte-reversal, perform a rev8 rd,rs followed by a srai rd,rd,K, where K is XLEN-32 and XLEN-16, respectively.

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rev.b

Synopsis: Reverse the bits in each byte of a source register.
Mnemonic: rev.b rd, rs
Encoding

Description: This instruction reverses the order of the bits in every byte of a register.
Operation

result : xlenbits = EXTZ(0b0);
foreach (i from 0 to sizeof(xlen) by 8) {
    result[i+7..i] = reverse_bits_in_byte(X(rs1)[i+7..i]);
};
X(rd) = result;

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rol

Synopsis: Rotate Left (Register)
Mnemonic: rol rd, rs1, rs2
Encoding

Description: This instruction performs a rotate left of rs1 by the amount in least-significant log2(XLEN) bits of rs2.
Operation

let shamt = if   xlen == 32
            then X(rs2)[4..0]
            else X(rs2)[5..0];
let result = (X(rs1) << shamt) | (X(rs1) >> (xlen - shamt));

X(rd) = result;

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rolw

Synopsis: Rotate Left Word (Register)
Mnemonic: rolw rd, rs1, rs2
Encoding

Description: This instruction performs a rotate left on the least-significant word of rs1 by the amount in least-significant 5 bits of rs2. The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits.
Operation

let rs1 = EXTZ(X(rs1)[31..0])
let shamt = X(rs2)[4..0];
let result = (rs1 << shamt) | (rs1 >> (32 - shamt));
X(rd) = EXTS(result[31..0]);

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ror

Synopsis: Rotate Right
Mnemonic: ror rd, rs1, rs2
Encoding

Description: This instruction performs a rotate right of rs1 by the amount in least-significant log2(XLEN) bits of rs2.
Operation

let shamt = if   xlen == 32
            then X(rs2)[4..0]
            else X(rs2)[5..0];
let result = (X(rs1) >> shamt) | (X(rs1) << (xlen - shamt));

X(rd) = result;

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rori

Synopsis: Rotate Right (Immediate)
Mnemonic: rori rd, rs1, shamt
Encoding (RV32)

Encoding (RV64)

Description: This instruction performs a rotate right of rs1 by the amount in the least-significant log2(XLEN) bits of shamt. For RV32, the encodings corresponding to shamt[5]=1 are reserved.
Operation

let shamt = if   xlen == 32
            then shamt[4..0]
            else shamt[5..0];
let result = (X(rs1) >> shamt) | (X(rs1) << (xlen - shamt));

X(rd) = result;

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roriw

Synopsis: Rotate Right Word by Immediate
Mnemonic: roriw rd, rs1, shamt
Encoding

Description: This instruction performs a rotate right on the least-significant word of rs1 by the amount in the least-significant log2(XLEN) bits of shamt. The resulting word value is sign-extended by copying bit 31 to all of the more-significant bits.
Operation

let rs1_data = EXTZ(X(rs1)[31..0];
let result = (rs1_data >> shamt) | (rs1_data << (32 - shamt));
X(rd) = EXTS(result[31..0]);

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rorw

Synopsis: Rotate Right Word (Register)
Mnemonic: rorw rd, rs1, rs2
Encoding

Description: This instruction performs a rotate right on the least-significant word of rs1 by the amount in least-significant 5 bits of rs2. The resultant word is sign-extended by copying bit 31 to all of the more-significant bits.
Operation

let rs1 = EXTZ(X(rs1)[31..0])
let shamt = X(rs2)[4..0];
let result = (rs1 >> shamt) | (rs1 << (32 - shamt));
X(rd) = EXTS(result);

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sext.b

Synopsis: Sign-extend byte
Mnemonic: sext.b rd, rs
Encoding

Description: This instruction sign-extends the least-significant byte in the source to XLEN by copying the most-significant bit in the byte (i.e., bit 7) to all of the more-significant bits.
Operation

X(rd) = EXTS(X(rs)[7..0]);

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sext.h

Synopsis: Sign-extend halfword
Mnemonic: sext.h rd, rs
Encoding

Description: This instruction sign-extends the least-significant halfword in rs to XLEN by copying the most-significant bit in the halfword (i.e., bit 15) to all of the more-significant bits.
Operation

X(rd) = EXTS(X(rs)[15..0]);

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sh1add

Synopsis: Shift left by 1 and add
Mnemonic: sh1add rd, rs1, rs2
Encoding

Description: This instruction shifts rs1 to the left by 1 bit and adds it to rs2.
Operation

X(rd) = X(rs2) + (X(rs1) << 1);

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sh1add.uw

Synopsis: Shift unsigned word left by 1 and add
Mnemonic: sh1add.uw rd, rs1, rs2
Encoding

Description: This instruction performs an XLEN-wide addition of two addends. The first addend is rs2. The second addend is the unsigned value formed by extracting the least-significant word of rs1 and shifting it left by 1 place.
Operation

let base = X(rs2);
let index = EXTZ(X(rs1)[31..0]);

X(rd) = base + (index << 1);

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sh2add

Synopsis: Shift left by 2 and add
Mnemonic: sh2add rd, rs1, rs2
Encoding

Description: This instruction shifts rs1 to the left by 2 places and adds it to rs2.
Operation

X(rd) = X(rs2) + (X(rs1) << 2);

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sh2add.uw

Synopsis: Shift unsigned word left by 2 and add
Mnemonic: sh2add.uw rd, rs1, rs2
Encoding

Description: This instruction performs an XLEN-wide addition of two addends. The first addend is rs2. The second addend is the unsigned value formed by extracting the least-significant word of rs1 and shifting it left by 2 places.
Operation

let base = X(rs2);
let index = EXTZ(X(rs1)[31..0]);

X(rd) = base + (index << 2);

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sh3add

Synopsis: Shift left by 3 and add
Mnemonic: sh3add rd, rs1, rs2
Encoding

Description: This instruction shifts rs1 to the left by 3 places and adds it to rs2.
Operation

X(rd) = X(rs2) + (X(rs1) << 3);

Included in

Extension

Minimum version

Lifecycle state

0.93

Frozen

sh3add.uw

Synopsis: Shift unsigned word left by 3 and add
Mnemonic: sh3add.uw rd, rs1, rs2
Encoding

Description: This instruction performs an XLEN-wide addition of two addends. The first addend is rs2. The second addend is the unsigned value formed by extracting the least-significant word of rs1 and shifting it left by 3 places.
Operation

let base = X(rs2);
let index = EXTZ(X(rs1)[31..0]);

X(rd) = base + (index << 3);

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Extension

Minimum version

Lifecycle state

0.93

Frozen

slli.uw

Synopsis: Shift-left unsigned word (Immediate)
Mnemonic: slli.uw rd, rs1, shamt
Encoding

Description: This instruction takes the least-significant word of rs1, zero-extends it, and shifts it left by the immediate.
Operation

X(rd) = (EXTZ(X(rs)[31..0]) << shamt);

Included in

Extension

Minimum version

Lifecycle state

0.93

Frozen

Architecture Explanation

This instruction is the same as slli with zext.w performed on rs1 before shifting.

unzip

Synopsis: Implements the inverse of the zip instruction.
Mnemonic: unzip rd, rs
Encoding

Description: This instruction gathers bits from the high and low halves of the source word into odd/even bit positions in the destination word. It is the inverse of the zip instruction. This instruction is available only on RV32.
Operation

foreach (i from 0 to xlen/2-1) {
  X(rd)[i] = X(rs1)[2*i]
  X(rd)[i+xlen/2] = X(rs1)[2*i+1]
}

Software Hint

This instruction is useful for implementing the SHA3 cryptographic hash function on a 32-bit architecture, as it implements the bit-interleaving operation used to speed up the 64-bit rotations directly.

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Zbkb (Bit-manipulation for Cryptography) (RV32)

v0.9.4

Frozen

xnor

Synopsis: Exclusive NOR
Mnemonic: xnor rd, rs1, rs2
Encoding

Description: This instruction performs the bit-wise exclusive-NOR operation on rs1 and rs2.
Operation

X(rd) = ~(X(rs1) ^ X(rs2));

Included in

Extension

Minimum version

Lifecycle state

0.93

Frozen

v0.9.4

Frozen

xperm.b

Synopsis: Byte-wise lookup of indices into a vector in registers.
Mnemonic: xperm.b rd, rs1, rs2
Encoding

Description: The xperm.b instruction operates on bytes. The rs1 register contains a vector of XLEN/8 8-bit elements. The rs2 register contains a vector of XLEN/8 8-bit indexes. The result is each element in rs2 replaced by the indexed element in rs1, or zero if the index into rs2 is out of bounds.
Operation

val xpermb_lookup : (bits(8), xlenbits) -> bits(8)
function xpermb_lookup (idx, lut) = {
    (lut >> (idx @ 0b000))[7..0]
}

function clause execute ( XPERM_B (rs2,rs1,rd)) = {
    result : xlenbits = EXTZ(0b0);
    foreach(i from 0 to xlen by 8) {
        result[i+7..i] = xpermn_lookup(X(rs2)[i+7..i], X(rs1));
    };
    X(rd) = result;
    RETIRE_SUCCESS
}

Included in

Extension

Minimum version

Lifecycle state

Zbkx (Crossbar permutations)

v0.9.4

Frozen

xperm.n

Synopsis: Nibble-wise lookup of indices into a vector.
Mnemonic: xperm.n rd, rs1, rs2
Encoding

Description: The xperm.n instruction operates on nibbles. The rs1 register contains a vector of XLEN/4 4-bit elements. The rs2 register contains a vector of XLEN/4 4-bit indexes. The result is each element in rs2 replaced by the indexed element in rs1, or zero if the index into rs2 is out of bounds.
Operation

val xpermn_lookup : (bits(4), xlenbits) -> bits(4)
function xpermn_lookup (idx, lut) = {
    (lut >> (idx @ 0b00))[3..0]
}

function clause execute ( XPERM_N (rs2,rs1,rd)) = {
    result : xlenbits = EXTZ(0b0);
    foreach(i from 0 to xlen by 4) {
        result[i+3..i] = xpermn_lookup(X(rs2)[i+3..i], X(rs1));
    };
    X(rd) = result;
    RETIRE_SUCCESS
}

Included in

Extension

Minimum version

Lifecycle state

Zbkx (Crossbar permutations)

v0.9.4

Frozen

zext.h

Synopsis: Zero-extend halfword
Mnemonic: zext.h rd, rs
Encoding (RV32)

Encoding (RV64)

Description: This instruction zero-extends the least-significant halfword of the source to XLEN by inserting 0’s into all of the bits more significant than 15.
Operation

X(rd) = EXTZ(X(rs)[15..0]);

Note

The zext.h mnemonic corresponds to different instruction encodings in RV32 and RV64.

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