srli

Shift right logical immediate

This instruction is defined by:

I, version >= 0

This instruction is included in the following profiles:

MockProfile 64-bit Unpriv (Mandatory)
MockProfile 64-bit S-mode (Mandatory)
RVA20U64 (Mandatory)
RVA22U64 (Mandatory)
RVI20U32 (Mandatory)
RVI20U64 (Mandatory)

Encoding

This instruction has different encodings in RV32 and RV64.

RV32
RV64

Assembly format

srli rd, rs1, shamt

Synopsis

This instruction must have data-independent timing when extension Zkt is enabled.

Shift the value in rs1 right by shamt, and store the result in rd

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

RV32
RV64

Bits<5> shamt = $encoding[24:20];
Bits<5> rs1 = $encoding[19:15];
Bits<5> rd = $encoding[11:7];

Bits<6> shamt = $encoding[25:20];
Bits<5> rs1 = $encoding[19:15];
Bits<5> rd = $encoding[11:7];

Execution

IDL
Sail

X[rd] = X[rs1] >> shamt;

{
  let rs1_val = X(rs1);
  /* the decoder guard should ensure that shamt[5] = 0 for RV32 */
  let result : xlenbits = match op {
    RISCV_SLLI => if   sizeof(xlen) == 32
                  then rs1_val << shamt[4..0]
                  else rs1_val << shamt,
    RISCV_SRLI => if   sizeof(xlen) == 32
                  then rs1_val >> shamt[4..0]
                  else rs1_val >> shamt,
    RISCV_SRAI => if   sizeof(xlen) == 32
                  then shift_right_arith32(rs1_val, shamt[4..0])
                  else shift_right_arith64(rs1_val, shamt)
  };
  X(rd) = result;
  RETIRE_SUCCESS
}