c.and

And

This instruction is defined by:

Encoding

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Synopsis

And rd with rs2, and store the result in rd The rd and rs2 register indexes should be used as rd+8 and rs2+8 (registers x8-x15). C.AND expands into and rd, rd, rs2.

Access

M

HS

U

VS

VU

Always

Always

Always

Always

Always

Decode Variables

Bits<3> rs2 = $encoding[4:2];
Bits<3> rd = $encoding[9:7];

Execution

  • Pruned, XLEN == 64

  • Original

XReg t0 = X[rd + 8];
XReg t1 = X[rs2 + 8];
X[rd + 8] = t0 & t1;
XReg t0 = X[rd + 8];
XReg t1 = X[rs2 + 8];
X[rd + 8] = t0 & t1;