pmpcfg8
PMP Configuration Register 8
PMP entry configuration
Fields
pmp32cfg
- Location
-
pmpcfg8[7:0] - Description
-
PMP configuration for entry 32
The bits are as follows:
Name
Location
Description +
L
7
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
6:5
Reserved Writes shall be ignored.
A
4:3
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
2
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
1
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
0
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp32cfg & 0x18) != 0x10 { return csr_value.pmp32cfg; } } return CSR[pmpcfg8].pmp32cfg;
pmp33cfg
- Location
-
pmpcfg8[15:8] - Description
-
PMP configuration for entry 33
The bits are as follows:
Name
Location
Description +
L
15
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
14:13
Reserved Writes shall be ignored.
A
12:11
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
10
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
9
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
8
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp33cfg & 0x18) != 0x10 { return csr_value.pmp33cfg; } } return CSR[pmpcfg8].pmp33cfg;
pmp34cfg
- Location
-
pmpcfg8[23:16] - Description
-
PMP configuration for entry 34
The bits are as follows:
Name
Location
Description +
L
23
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
22:21
Reserved Writes shall be ignored.
A
20:19
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
18
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
17
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
16
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp34cfg & 0x18) != 0x10 { return csr_value.pmp34cfg; } } return CSR[pmpcfg8].pmp34cfg;
pmp35cfg
- Location
-
pmpcfg8[31:24] - Description
-
PMP configuration for entry 35
The bits are as follows:
Name
Location
Description +
L
31
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
30:29
Reserved Writes shall be ignored.
A
28:27
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
26
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
25
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
24
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp35cfg & 0x18) != 0x10 { return csr_value.pmp35cfg; } } return CSR[pmpcfg8].pmp35cfg;
pmp36cfg
- Location
-
pmpcfg8[39:32] - Description
-
PMP configuration for entry 36
The bits are as follows:
Name
Location
Description +
L
39
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
38:37
Reserved Writes shall be ignored.
A
36:35
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
34
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
33
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
32
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp36cfg & 0x18) != 0x10 { return csr_value.pmp36cfg; } } return CSR[pmpcfg8].pmp36cfg;
pmp37cfg
- Location
-
pmpcfg8[47:40] - Description
-
PMP configuration for entry 37
The bits are as follows:
Name
Location
Description +
L
47
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
46:45
Reserved Writes shall be ignored.
A
44:43
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
42
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
41
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
40
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp37cfg & 0x18) != 0x10 { return csr_value.pmp37cfg; } } return CSR[pmpcfg8].pmp37cfg;
pmp38cfg
- Location
-
pmpcfg8[55:48] - Description
-
PMP configuration for entry 38
The bits are as follows:
Name
Location
Description +
L
55
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
54:53
Reserved Writes shall be ignored.
A
52:51
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
50
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
49
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
48
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp38cfg & 0x18) != 0x10 { return csr_value.pmp38cfg; } } return CSR[pmpcfg8].pmp38cfg;
pmp39cfg
- Location
-
pmpcfg8[63:56] - Description
-
PMP configuration for entry 39
The bits are as follows:
Name
Location
Description +
L
63
Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.
-
62:61
Reserved Writes shall be ignored.
A
60:59
Address matching mode. One of:
+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two
+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two
+
Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).
+
X
58
When clear, instruction fetchs cause an
Access Faultfor the matching region and privilege mode.W
57
When clear, stores and AMOs cause an
Access Faultfor the matching region and privilege mode.R
56
When clear, loads cause an
Access Faultfor the matching region and privilege mode.The combination of R = 0, W = 1 is reserved.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value, the field will be written with the return value of the function below.if (! { if ((false) || csr_value.pmp39cfg & 0x18) != 0x10 { return csr_value.pmp39cfg; } } return CSR[pmpcfg8].pmp39cfg;