vsstatus
Attributes
CSR Address |
0x200 |
---|---|
Virtual CSR Address |
0x100 |
Defining extension |
|
Length |
64-bit |
Privilege Mode |
VS |
Fields
SD
- Location
-
vsstatus[63]
- Description
-
State Dirty
Read-only bit that summarizes whether any of the vsstatus.FS, vsstatus.VS, or vsstatus.XS fields signal the presence of some dirty state (i.e., any of them hold the value
11
).This bit is not an alias of mstatus.SD since it only reflects the state visible to VS-mode (e.g.,
status.FS
does not affect vsstatus.SD). - Type
RO-H |
Read-Only with Hardware update Writes are ignored. Reads reflect a value dynamically generated by hardware. |
- Reset value
-
UNDEFINED_LEGAL
UXL
- Location
-
vsstatus[33:32]
- Description
-
VU-mode XLEN
Sets the effective XLEN for VU-mode (0 = 32-bit, 1 = 64-bit, 2 = 128-bit).
Since the hart only supports VUXLEN==32, this is hardwired to 0.
Since the hart only supports VUXLEN==64, this is hardwired to 1.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
64
MXR
- Location
-
vsstatus[19]
- Description
-
Make eXecutable Readable
Makes it possible to read executable pages when loading from effective VU-mode or VS-mode (normally, executable pages are not readable).
-
When 1, load in effective VU-mode or VS-mode from pages marked readable or executable are allowed as long as the page is marked readable (or executable and
status.MXR
is set) in the G-stage translation. -
When 0, load in effective VU-mode or VS-mode from pages marked executable raise a Page Fault exception (unless sstatus.MXR is also set, in which case the above applies).
'vsstatus.MXR' affects all loads that operate under effective VU-mode or VS-mode:
-
All loads in VU-mode
-
All loads in VS-mode
-
Loads in M-mode when mstatus.MPRV == 1, mstatus.MPV == 1, and mstatus.MPP[1] == 0
-
Loads generated by one of the
hlv.*
instructions.
-
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
UNDEFINED_LEGAL
SUM
- Location
-
vsstatus[18]
- Description
-
permit Supervisor Memory Access
Allows VS-mode to read user pages.
Applies to the following loads and stores:
-
All loads and stores in VS-mode.
-
All loads and stores in M-mode when mstatus.MPRV == 1, mstatus.MPP == 1, and mstatus.MPV == 1
-
Loads and stores generated by one of the
hlv.
,hlvx.
, orhsv.*
instructions.When vsstatus.SUM is 0, the loads and stores from the above categories cause an
Illegal Instruction
exception if they access a user page during VS-level translation. Otherwise, a load or store from the above categories is permitted to acess a user page during VS-level translation.
-
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
UNDEFINED_LEGAL
XS
- Location
-
vsstatus[16:15]
- Description
-
Custom (X) extension context Status
Summarizes the current state of any custom extension state. Either 0 - Off, 1 - Initial, 2 - Clean, 3 - Dirty. Since there are no custom extensions, this field is read-only 0.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
FS
- Location
-
vsstatus[14:13]
- Description
-
Floating point context status
When 0, floating point instructions (from F and D extensions) in VS-mode or VU-mode are disabled, and cause ILLEGAL INSTRUCTION exceptions. Floating point instructions in all modes, including VS-mode and VU-mode, are similarly disabled when mstatus.FS is clear.
When a floating point register, or the fcsr register is written in VS-mode or VU-mode, vsstatus.FS is written with the value 3.
Values 1 and 2 are valid write values for software, but are not interpreted by hardware other than to possibly enable a previously-disabled floating point unit.
- Type
RW-H |
Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write. |
- Reset value
-
UNDEFINED_LEGAL
VS
- Location
-
vsstatus[10:9]
- Description
-
Vector context status
When 0, vector instructions (from the V extension) are disabled, and cause ILLEGAL INSTRUCTION exceptions. When a vector register or vector CSR is written, VS obtains the value 3. Values 1 and 2 are valid write values for software, but are not interpreted by hardware other than to possibly enable a previously-disabled vector unit.
- Type
RW-H |
Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write. |
- Reset value
-
UNDEFINED_LEGAL
SPP
- Location
-
vsstatus[8]
- Description
-
VS-mode Previous Privilege
Written with the prior nominal privilege level (i.e., 0 for VU-mode and 1 for VS-mode) when entering VS-mode from an exception/interrupt. Can also be written by software without immediate side-effect.
On a return from an exception from VS-mode, the machine will enter the nominal privilege level stored in vsstatus.SPP.
- Type
RW-H |
Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write. |
- Reset value
-
UNDEFINED_LEGAL
UBE
- Location
-
vsstatus[6]
- Description
-
VU-mode Big Endian
Controls the endianness of VU-mode (0 = little, 1 = big).
Since the CPU does not support big endian, this is hardwired to 0.
Since the CPU does not support big endian, this is hardwired to 1.
- Type
RO |
Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored. |
- Reset value
-
0
SPIE
- Location
-
vsstatus[5]
- Description
-
VS-mode Previous Interrupt Enable
Written by hardware in two cases:
-
Written with prior value of vsstatus.SIE when entering VS-mode from an exception/interrupt.
-
Writen with the value 1 when returning from an exception in VS-mode (via the sret instruction).
Can also be written by software without immediate side effect.
Other than serving as a record of nested traps as described above, vsstatus.SPIE does not affect execution.
-
- Type
RW-H |
Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write. |
- Reset value
-
UNDEFINED_LEGAL
SIE
- Location
-
vsstatus[1]
- Description
-
VS-mode Interrupt Enable
Written by hardware in two cases:
-
Written with the value 0 when entering VS-mode from an exception/interrupt.
-
Written with the prior value of vsstatus.SPIE when returning from an exeception in VS-mode (via sret).
Affects execution by:
-
When 0, all VS-mode interrupts are disabled when the current privilege level is VS ((H)S-mode and M-mode interrupts are still enabled).
-
When 1, VS-mode interrupts that are not otherwise disabled with a field in
vsie
are enabled.
-
- Type
RW-H |
Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write. |
- Reset value
-
UNDEFINED_LEGAL