pmpcfg0

PMP Configuration Register 0

PMP entry configuration

Attributes

CSR Address

0x3a0

Defining extension

  • Smpmp, version >= 0

Length

64-bit

Privilege Mode

M

Format

pmpcfg0 format
Figure 1. pmpcfg0 format

Field Summary

Name Location Type Reset Value

pmp0cfg

7:0

RW-R

UNDEFINED_LEGAL

pmp1cfg

15:8

RW-R

UNDEFINED_LEGAL

pmp2cfg

23:16

RW-R

UNDEFINED_LEGAL

pmp3cfg

31:24

RW-R

UNDEFINED_LEGAL

pmp4cfg

39:32

RW-R

UNDEFINED_LEGAL

pmp5cfg

47:40

RW-R

UNDEFINED_LEGAL

pmp6cfg

55:48

RW-R

UNDEFINED_LEGAL

pmp7cfg

63:56

RW-R

UNDEFINED_LEGAL

Fields

pmp0cfg

Location

pmpcfg0[7:0]

Description

PMP configuration for entry 0

The bits are as follows:

Name

Location

Description +

L

7

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

6:5

Reserved Writes shall be ignored.

A

4:3

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

2

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

1

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

0

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp0cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp0cfg & 0x18) != 0x10 {
      return csr_value.pmp0cfg;
    }
  }
}
return CSR[pmpcfg0].pmp0cfg;

pmp1cfg

Location

pmpcfg0[15:8]

Description

PMP configuration for entry 1

The bits are as follows:

Name

Location

Description +

L

15

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

14:13

Reserved Writes shall be ignored.

A

12:11

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

10

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

9

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

8

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp1cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp1cfg & 0x18) != 0x10 {
      return csr_value.pmp1cfg;
    }
  }
}
return CSR[pmpcfg0].pmp1cfg;

pmp2cfg

Location

pmpcfg0[23:16]

Description

PMP configuration for entry 2

The bits are as follows:

Name

Location

Description +

L

23

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

22:21

Reserved Writes shall be ignored.

A

20:19

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

18

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

17

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

16

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp2cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp2cfg & 0x18) != 0x10 {
      return csr_value.pmp2cfg;
    }
  }
}
return CSR[pmpcfg0].pmp2cfg;

pmp3cfg

Location

pmpcfg0[31:24]

Description

PMP configuration for entry 3

The bits are as follows:

Name

Location

Description +

L

31

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

30:29

Reserved Writes shall be ignored.

A

28:27

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

26

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

25

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

24

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp3cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp3cfg & 0x18) != 0x10 {
      return csr_value.pmp3cfg;
    }
  }
}
return CSR[pmpcfg0].pmp3cfg;

pmp4cfg

Location

pmpcfg0[39:32]

Description

PMP configuration for entry 4

The bits are as follows:

Name

Location

Description +

L

39

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

38:37

Reserved Writes shall be ignored.

A

36:35

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

34

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

33

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

32

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp4cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp4cfg & 0x18) != 0x10 {
      return csr_value.pmp4cfg;
    }
  }
}
return CSR[pmpcfg0].pmp4cfg;

pmp5cfg

Location

pmpcfg0[47:40]

Description

PMP configuration for entry 5

The bits are as follows:

Name

Location

Description +

L

47

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

46:45

Reserved Writes shall be ignored.

A

44:43

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

42

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

41

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

40

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp5cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp5cfg & 0x18) != 0x10 {
      return csr_value.pmp5cfg;
    }
  }
}
return CSR[pmpcfg0].pmp5cfg;

pmp6cfg

Location

pmpcfg0[55:48]

Description

PMP configuration for entry 6

The bits are as follows:

Name

Location

Description +

L

55

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

54:53

Reserved Writes shall be ignored.

A

52:51

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

50

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

49

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

48

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp6cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp6cfg & 0x18) != 0x10 {
      return csr_value.pmp6cfg;
    }
  }
}
return CSR[pmpcfg0].pmp6cfg;

pmp7cfg

Location

pmpcfg0[63:56]

Description

PMP configuration for entry 7

The bits are as follows:

Name

Location

Description +

L

63

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

62:61

Reserved Writes shall be ignored.

A

60:59

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Natrually aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Natrually aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

58

When clear, instruction fetchs cause an Access Fault for the matching region and privilege mode.

W

57

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

56

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((CSR[pmpcfg0].pmp7cfg) == 0) {
  if (! {
    if ((false) || csr_value.pmp7cfg & 0x18) != 0x10 {
      return csr_value.pmp7cfg;
    }
  }
}
return CSR[pmpcfg0].pmp7cfg;