mhpmevent3

Machine Hardware Performance Counter 3 Control

Programmable hardware performance counter event selector and overflow/filtering control

Attributes

CSR Address	0x323
Defining extension	Smhpm, version >= 0
Length	64-bit
Privilege Mode	M

CSR Address

0x323

Defining extension

Smhpm, version >= 0

Length

64-bit

Privilege Mode

Format

Figure 1. mhpmevent3 format

Field Summary

Name Location Type Reset Value

Name	Location	Type	Reset Value
`OF`	63	RW-H	UNDEFINED_LEGAL
`MINH`	62	RW	UNDEFINED_LEGAL
`SINH`	61	RW	UNDEFINED_LEGAL
`UINH`	60	RW	UNDEFINED_LEGAL
`VSINH`	59	RW	UNDEFINED_LEGAL
`VUINH`	58	RW	UNDEFINED_LEGAL
`EVENT`	57:0	RW	UNDEFINED_LEGAL

OF

RW-H

UNDEFINED_LEGAL

MINH

UNDEFINED_LEGAL

SINH

UNDEFINED_LEGAL

UINH

UNDEFINED_LEGAL

VSINH

UNDEFINED_LEGAL

VUINH

UNDEFINED_LEGAL

EVENT

57:0

UNDEFINED_LEGAL

Fields

`OF`

Location: mhpmevent3[63]
Description: Overflow status and interrupt disable.

The OF bit is set when the corresponding hpmcounter overflows, and remains set until written by software. Since hpmcounter values are unsigned values, overflow is defined as unsigned overflow of the implemented counter bits.

The OF bit is sticky; it stays set until explictly cleared by a CSR write.

A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter3 overflows.
Type

RW-H	Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write.

Reset value: UNDEFINED_LEGAL

`MINH`

Location: mhpmevent3[62]
Description: When set, mhpmcounter3 does not increment while the hart in operating in M-mode.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`SINH`

Location: mhpmevent3[61]
Description: When set, mhpmcounter3 does not increment while the hart in operating in (H)S-mode.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`UINH`

Location: mhpmevent3[60]
Description: When set, mhpmcounter3 does not increment while the hart in operating in U-mode.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`VSINH`

Location: mhpmevent3[59]
Description: When set, mhpmcounter3 does not increment while the hart in operating in VS-mode.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`VUINH`

Location: mhpmevent3[58]
Description: When set, mhpmcounter3 does not increment while the hart in operating in VU-mode.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`EVENT`

Location: mhpmevent3[57:0]
Description: Event selector for performance counter mhpmcounter3.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value

UNDEFINED_LEGAL

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if (ary_includes?<$array_size(HPM_EVENTS), 58>(HPM_EVENTS, csr_value.EVENT)) {
  return csr_value.EVENT;
} else {
  return UNDEFINED_LEGAL_DETERMINISTIC;
}