c.sd

Store double

This instruction is defined by:

Encoding

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Synopsis

For RV64, store a 64-bit value in register xs2 to memory. For RV32 with Zclsd extension, store a 64-bit value from the combined values in register pair [xs2, xs2+1] to memory. It computes an effective address by adding the zero-extended offset, scaled by 8, to the base address in register xs1. It expands to sd xs2, offset(xs1).

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<8> imm = {$encoding[6:5], $encoding[12:10], 3'd0};
Bits<3> xs2 = $encoding[4:2];
Bits<3> xs1 = $encoding[9:7];

Execution

  • Pruned, XLEN == 64

  • Original

if (implemented?(ExtensionName::C) && (misa.C == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
XReg virtual_address = X[creg2reg(xs1)] + imm;
write_memory<64>(virtual_address, X[creg2reg(xs2)], $encoding);
if (implemented?(ExtensionName::C) && (misa.C == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
XReg virtual_address = X[creg2reg(xs1)] + imm;
if (xlen() == 32) {
  if (implemented?(ExtensionName::Zclsd)) {
    Bits<64> data = {X[creg2reg(xs2) + 1], X[creg2reg(xs2)]};
    write_memory<64>(virtual_address, data, $encoding);
  } else {
    raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
  }
} else {
  write_memory<64>(virtual_address, X[creg2reg(xs2)], $encoding);
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

  • LoadAccessFault

  • StoreAmoAccessFault

  • StoreAmoPageFault