senvcfg
Supervisor Environment Configuration
Contains fields that control certain characteristics of the U-mode execution environment.
Attributes
CSR Address |
0x10a |
---|---|
Defining extension |
|
Length |
64-bit |
Privilege Mode |
S |
Fields
CBZE
- Location
-
senvcfg[7]
- Description
-
Cache Block Zero instruction Enable
Bit is read-only 0 when menvcfg.CBZE is clear.
Enables the execution of the cache block zero instruction, cbo.zero, in U-mode and (in conjunction with henvcfg.CBZE) VU-mode.
-
0
: The instruction raises an illegal instruction or virtual instruction exception -
1
: The instruction is executedTo summarize access:
-
senvcfg.CBZE behavior + |
|
0 |
read-only 0 |
1 |
writable, independent bit from menvcfg.CBZE |
+ See cbo.zero for a summary of the effect.
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
UNDEFINED_LEGAL
CBCFE
- Location
-
senvcfg[6]
- Description
-
Cache Block Clean and Flush instruction Enable
Enables the execution of the cache block clean instruction, cbo.clean, and the cache block flush instruction, cbo.flush, in S-mode .
-
0
: The instruction raises an illegal instruction or virtual instruction exception -
1
: The instruction is executedTo summarize access:
-
senvcfg.CBCFE behavior + |
|
0 |
read-only 0 |
1 |
writable, independent bit from menvcfg.CBCFE |
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
UNDEFINED_LEGAL
CBIE
- Location
-
senvcfg[5:4]
- Description
-
Cache Block Invalidate instruction Enable
This field has restricted values based on the value of menvcfg.CBIE. When an invalid value is written, it is ignored and the field remains unchanged.
Valid values of senvcfg.CBIE +
00
00
01
00, 01
11
00, 01, 11
Controls execution of the cache block invalidate instruction, cbo.inval, in U-mode and VU-mode (together with henvcfg.CBIE) .
-
00
: The instruction raises an illegal instruction or virtual instruction exception -
01
: The instruction is executed and performs a flush operation -
10
: Reserved -
11
: The instruction is executed and performs an invalidate operationSee cbo.inval for more details.
-
- Type
RW-R |
Read-Write Restricted Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state. |
- Reset value
-
UNDEFINED_LEGAL
- Software write
-
This field has special behavior when written by software (e.g., through csrrw).
When software tries to write
csr_value
, the field will be written with the return value of the function below.if (csr_value.CBIE == 0 || csr_value.CBIE == 1 || csr_value.CBIE == 3) { return csr_value.CBIE; } else { return UNDEFINED_LEGAL_DETERMINISTIC; }
FIOM
- Location
-
senvcfg[0]
- Description
-
Fence of I/O implies Memory
When either senvcfg.FIOM or menvcfg.FIOM is set, FENCE instructions ordering I/O regions also implicitly order memory regions when executed in U-mode as follows:
Instruction bit Meaning when set PI
POPredecessor device input and memory reads (PR implied)
Predecessor device output and memory writes (PW implied)SI
SOSuccessor device input and memory reads (SR implied)
Successor device output and memory writes (SW implied)Similarly, in U-mode when FIOM=1, if an atomic instruction that accesses a region ordered as device I/O has its aq and/or rl bit set, then that instruction is ordered as though it accesses both device I/O and memory.
See fence for more details.
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
0