misa

Machine ISA Control

Reports the XLEN and "major" extensions supported by the ISA.

Attributes

CSR Address	0x301
Defining extension	Sm, version >= Sm@1.11.0
Length	64-bit
Privilege Mode	M

CSR Address

0x301

Defining extension

Sm, version >= Sm@1.11.0

Length

64-bit

Privilege Mode

Format

Figure 1. misa format

Field Summary

Name	Location	Type	Reset Value
`MXL`	63:62	RO	2
`A`	0	RO	1
`B`	1	RO	1
`C`	2	RO	1
`D`	3	RO	1
`F`	5	RO	1
`G`	6	RO	1
`H`	7	RO	1
`I`	8	RO	1
`M`	12	RO	1
`S`	18	RO	1
`U`	20	RO	1
`V`	21	RO	1

Fields

`MXL`

Location: misa[63:62]
Description: XLEN in M-mode.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 2

A

Location: misa[0]
Description: Indicates support for the A (atomic) extension.

Writing 0 to this field will cause all atomic instructions to raise an IllegalInstruction exception.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

B

Location: misa[1]
Description: Indicates support for the B (bitmanip) extension.

Writing 0 to this field will cause all bitmanip instructions to raise an IllegalInstruction exception.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

C

Location: misa[2]
Description: Indicates support for the C (compressed) extension.

Writing 0 to this field will cause all compressed instructions to raise an IllegalInstruction exception. Additionally, IALIGN becomes 32.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

D

Location: misa[3]
Description: Indicates support for the D (double precision float) extension.

Writing 0 to this field will cause all double-precision floating point instructions to raise an IllegalInstruction exception.

+ Additionally, the upper 32-bits of the f registers will read as zero.

Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

F

Location: misa[5]
Description: Indicates support for the F (single precision float) extension.

Writing 0 to this field will cause all floating point (single and double precision) instructions to raise an IllegalInstruction exception.

+ Writing 0 to this field with misa.D set will result in UNDEFINED behavior.

Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if (csr_value.F == 0 && csr_value.D == 1) {
  return UNDEFINED_LEGAL_DETERMINISTIC;
}
return csr_value.F;

`G`

Location: misa[6]
Description: Indicates support for all of the following extensions: I, A, M, F, D.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

H

Location: misa[7]
Description: Indicates support for the H (hypervisor) extension.

Writing 0 to this field will cause all attempts to enter VS- or VU- mode, execute a hypervisor instruction, or access a hypervisor CSR to raise an IllegalInstruction fault.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

I

Location: misa[8]
Description: Indicates support for the I (base) extension.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

M

Location: misa[12]
Description: Indicates support for the M (integer multiply/divide) extension.

Writing 0 to this field will cause all attempts to execute an integer multiply or divide instruction to raise an IllegalInstruction exception.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

S

Location: misa[18]
Description: Indicates support for the S (supervisor mode) extension.

Writing 0 to this field will cause all attempts to enter S-mode or access S-mode state to raise an exception.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

U

Location: misa[20]
Description: Indicates support for the U (user mode) extension.

Writing 0 to this field will cause all attempts to enter U-mode to raise an exception.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

V

Location: misa[21]
Description: Indicates support for the V (vector) extension.

Writing 0 to this field will cause all attempts to execute a vector instruction to raise an IllegalInstruction trap.
Type

RO	Read-Only Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value: 1

Software read

This CSR may return a value that is different from what is stored in hardware.

Pruned
Original

return %%LINK%csr_field;misa.MXL;CSR[misa].MXL%% << (%%LINK%func;xlen;xlen%%() - 2 | (%%LINK%csr_field;misa.V;CSR[misa].V%% << 21) | (%%LINK%csr_field;misa.U;CSR[misa].U%% << 20) | (%%LINK%csr_field;misa.S;CSR[misa].S%% << 18) | (%%LINK%csr_field;misa.M;CSR[misa].M%% << 12) | (%%LINK%csr_field;misa.I;CSR[misa].I%% << 7) | (%%LINK%csr_field;misa.H;CSR[misa].H%% << 6) | ((%%LINK%csr_field;misa.A;CSR[misa].A%% & %%LINK%csr_field;misa.M;CSR[misa].M%% & %%LINK%csr_field;misa.F;CSR[misa].F%% & %%LINK%csr_field;misa.D;CSR[misa].D%%) << 5) | (%%LINK%csr_field;misa.F;CSR[misa].F%% << 4) | (%%LINK%csr_field;misa.D;CSR[misa].D%% << 3) | (%%LINK%csr_field;misa.C;CSR[misa].C%% << 2) | (%%LINK%csr_field;misa.B;CSR[misa].B%% << 1) | %%LINK%csr_field;misa.A;CSR[misa].A%%);

return %%LINK%csr_field;misa.MXL;CSR[misa].MXL%% << (%%LINK%func;xlen;xlen%%() - 2 | (%%LINK%csr_field;misa.V;CSR[misa].V%% << 21) | (%%LINK%csr_field;misa.U;CSR[misa].U%% << 20) | (%%LINK%csr_field;misa.S;CSR[misa].S%% << 18) | (%%LINK%csr_field;misa.M;CSR[misa].M%% << 12) | (%%LINK%csr_field;misa.I;CSR[misa].I%% << 7) | (%%LINK%csr_field;misa.H;CSR[misa].H%% << 6) | ((%%LINK%csr_field;misa.A;CSR[misa].A%% & %%LINK%csr_field;misa.M;CSR[misa].M%% & %%LINK%csr_field;misa.F;CSR[misa].F%% & %%LINK%csr_field;misa.D;CSR[misa].D%%) << 5) | (%%LINK%csr_field;misa.F;CSR[misa].F%% << 4) | (%%LINK%csr_field;misa.D;CSR[misa].D%% << 3) | (%%LINK%csr_field;misa.C;CSR[misa].C%% << 2) | (%%LINK%csr_field;misa.B;CSR[misa].B%% << 1) | %%LINK%csr_field;misa.A;CSR[misa].A%%);