divw

Signed 32-bit division

This instruction is defined by:

Encoding

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Synopsis

Divide the lower 32-bits of register xs1 by the lower 32-bits of register xs2, and store the sign-extended result in xd.

The remainder is discarded.

Division by zero will put -1 into xd.

Division resulting in signed overflow (when most negative number is divided by -1) will put the most negative number into xd;

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<5> xs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];

Execution

  • Pruned, XLEN == 64

  • Original

if (implemented?(ExtensionName::M) && (misa.M == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
Bits<32> src1 = X[xs1][31:0];
Bits<32> src2 = X[xs2][31:0];
if (src2 == 0) {
  X[xd] = {MXLEN{1'b1}};
} else if ((src1 == 32'h80000000) && (src2 == 32'hFFFFFFFF)) {
  X[xd] = 0xffffffff80000000;
} else {
  X[xd] = sext($signed(src1) / $signed(src2), 32);
}
if (implemented?(ExtensionName::M) && (misa.M == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
Bits<32> src1 = X[xs1][31:0];
Bits<32> src2 = X[xs2][31:0];
if (src2 == 0) {
  X[xd] = {MXLEN{1'b1}};
} else if ((src1 == 32'h80000000) && (src2 == 32'hFFFFFFFF)) {
  X[xd] = sext(32'h80000000, 32);
} else {
  X[xd] = sext($signed(src1) / $signed(src2), 32);
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction