mhpmcounter4

Machine Hardware Performance Counter 4

Programmable hardware performance counter.

Attributes

CSR Address

0xb04

Defining extension

  • Smhpm, version >= Smhpm@1.11.0

Length

64-bit

Privilege Mode

M

Format

mhpmcounter4 format
Figure 1. mhpmcounter4 format

Field Summary

Name Location Type Reset Value

COUNT

63:0

RW-H

UNDEFINED_LEGAL

Fields

COUNT

Location

mhpmcounter4[63:0]

Description

Performance counter for event selected in mhpmevent4.EVENT.

+ Increments every time event occurs unless:

+ * mcountinhibit.HPM4 or its alias scountinhibit.HPM4 is set * mhpmevent4.MINH is set and the current privilege level is M * mhpmevent4.SINH or its alias hpmevent4..SINH is set and the current privilege level is (H)S * mhpmevent4.UINH or its alias hpmevent4.SINH is set and the current privilege level is U * mhpmevent4.VSINH or its alias hpmevent4.SINH is set and the current privilege level is VS * mhpmevent4.VUINH or its alias hpmevent4.SINH is set and the current privilege level is VU

+

Unimplemented performance counter. Must be read-only 0 (access does not cause trap).

Type

RW-H

Read-Write with Hardware update

Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write.
Reset value

UNDEFINED_LEGAL

Software read

This CSR may return a value that is different from what is stored in hardware.

  • Pruned

  • Original

return %%LINK%func;read_hpm_counter;read_hpm_counter%%(4);
if (HPM_COUNTER_EN[4]) {
  return %%LINK%func;read_hpm_counter;read_hpm_counter%%(4);
} else {
  return 0;
}