mhpmevent10h
Machine Hardware Performance Counter 10 Control, High half
Alias of mhpmevent10[63:32].
Introduced with the Sscofpmf extension. Prior to that, there was no way to access the upper
32-bits of mhpmevent#{hpm_num}.
Attributes
CSR Address |
0x72a |
|---|---|
Defining extension |
|
Length |
32-bit |
Privilege Mode |
M |
Fields
OF
- Location
-
mhpmevent10h[31] - Description
-
Alias of mhpmevent10.OF.
- Type
RW-H |
Read-Write with Hardware update Field is writable by software. Any value that fits in the field is acceptable. Hardware also updates the field without an explicit software write. |
- Reset value
-
UNDEFINED_LEGAL
MINH
- Location
-
mhpmevent10h[30] - Description
-
Alias of mhpmevent10.MINH.
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
UNDEFINED_LEGAL
SINH
- Location
-
mhpmevent10h[29] - Description
-
Alias of mhpmevent10.SINH.
- Type
- Reset value
-
UNDEFINED_LEGAL
UINH
- Location
-
mhpmevent10h[28] - Description
-
Alias of mhpmevent10.UINH.
- Type
- Reset value
-
UNDEFINED_LEGAL
VSINH
- Location
-
mhpmevent10h[27] - Description
-
Alias of mhpmevent10.VSINH.
- Type
- Reset value
-
UNDEFINED_LEGAL
VUINH
- Location
-
mhpmevent10h[26] - Description
-
Alias of mhpmevent10.VUINH.
- Type
- Reset value
-
UNDEFINED_LEGAL
EVENT
- Location
-
mhpmevent10h[25:0] - Description
-
High part of event selector for performance counter mhpmcounter10.
- Type
RW |
Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads. |
- Reset value
-
UNDEFINED_LEGAL