pmpcfg2

PMP Configuration Register 2

PMP entry configuration

Attributes

CSR Address

0x3a2

Defining extension

Smpmp, version >= Smpmp@1.11.0

Length

64-bit

Privilege Mode

M

Format

pmpcfg2 format
Figure 1. pmpcfg2 format

Field Summary

Name Location Type Reset Value

pmp8cfg

7:0

RW-R

0

pmp9cfg

15:8

RW-R

0

pmp10cfg

23:16

RW-R

0

pmp11cfg

31:24

RW-R

0

pmp12cfg

39:32

RW-R

0

pmp13cfg

47:40

RW-R

0

pmp14cfg

55:48

RO

0

pmp15cfg

63:56

RO

0

Fields

pmp8cfg

Location

pmpcfg2[7:0]

Description

PMP configuration for entry 8

The bits are as follows:

Name

Location

Description +

L

7

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

6:5

Reserved Writes shall be ignored.

A

4:3

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

2

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

1

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

0

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((pmpcfg2.pmp8cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp8cfg & 0x18) != 0x10 {
      return csr_value.pmp8cfg;
    }
  }
}
return pmpcfg2.pmp8cfg;

pmp9cfg

Location

pmpcfg2[15:8]

Description

PMP configuration for entry 9

The bits are as follows:

Name

Location

Description +

L

15

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

14:13

Reserved Writes shall be ignored.

A

12:11

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

10

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

9

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

8

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((pmpcfg2.pmp9cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp9cfg & 0x18) != 0x10 {
      return csr_value.pmp9cfg;
    }
  }
}
return pmpcfg2.pmp9cfg;

pmp10cfg

Location

pmpcfg2[23:16]

Description

PMP configuration for entry 10

The bits are as follows:

Name

Location

Description +

L

23

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

22:21

Reserved Writes shall be ignored.

A

20:19

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

18

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

17

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

16

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((pmpcfg2.pmp10cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp10cfg & 0x18) != 0x10 {
      return csr_value.pmp10cfg;
    }
  }
}
return pmpcfg2.pmp10cfg;

pmp11cfg

Location

pmpcfg2[31:24]

Description

PMP configuration for entry 11

The bits are as follows:

Name

Location

Description +

L

31

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

30:29

Reserved Writes shall be ignored.

A

28:27

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

26

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

25

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

24

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((pmpcfg2.pmp11cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp11cfg & 0x18) != 0x10 {
      return csr_value.pmp11cfg;
    }
  }
}
return pmpcfg2.pmp11cfg;

pmp12cfg

Location

pmpcfg2[39:32]

Description

PMP configuration for entry 12

The bits are as follows:

Name

Location

Description +

L

39

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

38:37

Reserved Writes shall be ignored.

A

36:35

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

34

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

33

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

32

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((pmpcfg2.pmp12cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp12cfg & 0x18) != 0x10 {
      return csr_value.pmp12cfg;
    }
  }
}
return pmpcfg2.pmp12cfg;

pmp13cfg

Location

pmpcfg2[47:40]

Description

PMP configuration for entry 13

The bits are as follows:

Name

Location

Description +

L

47

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

46:45

Reserved Writes shall be ignored.

A

44:43

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

42

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

41

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

40

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RW-R

Read-Write Restricted

Field is writable by software. Only certain values are legal. Writing an illegal value into the field is ignored, and the field retains its prior state.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((xlen() == 64) && (pmpcfg2.pmp13cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp13cfg & 0x18) != 0x10 {
      return csr_value.pmp13cfg;
    }
  }
}
return pmpcfg2.pmp13cfg;

pmp14cfg

Location

pmpcfg2[55:48]

Description

PMP configuration for entry 14

The bits are as follows:

Name

Location

Description +

L

55

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

54:53

Reserved Writes shall be ignored.

A

52:51

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

50

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

49

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

48

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RO

Read-Only

Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((xlen() == 64) && (pmpcfg2.pmp14cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp14cfg & 0x18) != 0x10 {
      return csr_value.pmp14cfg;
    }
  }
}
return pmpcfg2.pmp14cfg;

pmp15cfg

Location

pmpcfg2[63:56]

Description

PMP configuration for entry 15

The bits are as follows:

Name

Location

Description +

L

63

Locks the entry from further modification. Additionally, when set, PMP checks also apply to M-mode for the entry.

-

62:61

Reserved Writes shall be ignored.

A

60:59

Address matching mode. One of:

+ [when="PMP_GRANULARITY < 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NA4 (2) - Naturally aligned four-byte region * NAPOT (3) - Naturally aligned power of two

+ [when="PMP_GRANULARITY >= 2"] * OFF (0) - Null region (disabled) * TOR (1) - Top of range * NAPOT (3) - Naturally aligned power of two

+

Naturally aligned four-byte region, NA4 (2), is not valid (not needed when the PMP granularity is larger than 4 bytes).

+

X

58

When clear, instruction fetches cause an Access Fault for the matching region and privilege mode.

W

57

When clear, stores and AMOs cause an Access Fault for the matching region and privilege mode.

R

56

When clear, loads cause an Access Fault for the matching region and privilege mode.

The combination of R = 0, W = 1 is reserved.

Type

RO

Read-Only

Field has a hardwired value that does not change. Writes to an RO field are ignored.

Reset value

0

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

if ((xlen() == 64) && (pmpcfg2.pmp15cfg & 0x80) == 0) {
  if (! {
    if (csr_value.pmp15cfg & 0x18) != 0x10 {
      return csr_value.pmp15cfg;
    }
  }
}
return pmpcfg2.pmp15cfg;