Implemented CSRs

The following are implemented by the example_rv64_with_overlay configuration:

fcsr Floating-point control and status register (frm + fflags)
fflags Floating-Point Accrued Exceptions
frm Floating-Point Dynamic Rounding Mode
hcounteren Hypervisor Counter Enable
henvcfg Hypervisor Environment Configuration
hgatp Hypervisor guest address translation and protection
htimedelta Hypervisor time delta
htinst Hypervisor Trap Instruction Register
htval Hypervisor Trap Value Register
mtinst Machine Trap Instruction Register
mtval2 Machine Second Trap Value Register
vsatp Virtual Supervisor Address Translation and Protection
mcounteren Machine Counter Enable
pmpaddr0 PMP Address 0
pmpaddr1 PMP Address 1
pmpaddr10 PMP Address 10
pmpaddr11 PMP Address 11
pmpaddr12 PMP Address 12
pmpaddr13 PMP Address 13
pmpaddr14 PMP Address 14
pmpaddr15 PMP Address 15
pmpaddr16 PMP Address 16
pmpaddr17 PMP Address 17
pmpaddr18 PMP Address 18
pmpaddr19 PMP Address 19
pmpaddr2 PMP Address 2
pmpaddr20 PMP Address 20
pmpaddr21 PMP Address 21
pmpaddr22 PMP Address 22
pmpaddr23 PMP Address 23
pmpaddr24 PMP Address 24
pmpaddr25 PMP Address 25
pmpaddr26 PMP Address 26
pmpaddr27 PMP Address 27
pmpaddr28 PMP Address 28
pmpaddr29 PMP Address 29
pmpaddr3 PMP Address 3
pmpaddr30 PMP Address 30
pmpaddr31 PMP Address 31
pmpaddr32 PMP Address 32
pmpaddr33 PMP Address 33
pmpaddr34 PMP Address 34
pmpaddr35 PMP Address 35
pmpaddr36 PMP Address 36
pmpaddr37 PMP Address 37
pmpaddr38 PMP Address 38
pmpaddr39 PMP Address 39
pmpaddr4 PMP Address 4
pmpaddr40 PMP Address 40
pmpaddr41 PMP Address 41
pmpaddr42 PMP Address 42
pmpaddr43 PMP Address 43
pmpaddr44 PMP Address 44
pmpaddr45 PMP Address 45
pmpaddr46 PMP Address 46
pmpaddr47 PMP Address 47
pmpaddr48 PMP Address 48
pmpaddr49 PMP Address 49
pmpaddr5 PMP Address 5
pmpaddr50 PMP Address 50
pmpaddr51 PMP Address 51
pmpaddr52 PMP Address 52
pmpaddr53 PMP Address 53
pmpaddr54 PMP Address 54
pmpaddr55 PMP Address 55
pmpaddr56 PMP Address 56
pmpaddr57 PMP Address 57
pmpaddr58 PMP Address 58
pmpaddr59 PMP Address 59
pmpaddr6 PMP Address 6
pmpaddr60 PMP Address 60
pmpaddr61 PMP Address 61
pmpaddr62 PMP Address 62
pmpaddr63 PMP Address 63
pmpaddr7 PMP Address 7
pmpaddr8 PMP Address 8
pmpaddr9 PMP Address 9
pmpcfg0 PMP Configuration Register 0
pmpcfg10 PMP Configuration Register 10
pmpcfg12 PMP Configuration Register 12
pmpcfg14 PMP Configuration Register 14
pmpcfg2 PMP Configuration Register 2
pmpcfg4 PMP Configuration Register 4
pmpcfg6 PMP Configuration Register 6
pmpcfg8 PMP Configuration Register 8
scounteren Supervisor Counter Enable
mcyclecfg Machine Cycle Counter Configuration
mcyclecfgh Machine Cycle Counter Configuration High
minstretcfg Machine Instructions-Retired Counter Configuration
minstretcfgh Machine Instructions-Retired Counter Configuration High
scountovf Supervisor Count Overflow
vcsr Vector Control and Status Register
vl Vector Length
vlenb Vector Byte Length
vstart Vector Start Index
vtype Vector Type
vxrm Vector Fixed-Point Rounding Mode
vxsat Vector Fixed-Point Saturate Flag
mcountinhibit Machine Counter Inhibit
hpmcounter10 User-mode Hardware Performance Counter 7
hpmcounter11 User-mode Hardware Performance Counter 8
hpmcounter12 User-mode Hardware Performance Counter 9
hpmcounter13 User-mode Hardware Performance Counter 10
hpmcounter14 User-mode Hardware Performance Counter 11
hpmcounter15 User-mode Hardware Performance Counter 12
hpmcounter16 User-mode Hardware Performance Counter 13
hpmcounter17 User-mode Hardware Performance Counter 14
hpmcounter18 User-mode Hardware Performance Counter 15
hpmcounter19 User-mode Hardware Performance Counter 16
hpmcounter20 User-mode Hardware Performance Counter 17
hpmcounter21 User-mode Hardware Performance Counter 18
hpmcounter22 User-mode Hardware Performance Counter 19
hpmcounter23 User-mode Hardware Performance Counter 20
hpmcounter24 User-mode Hardware Performance Counter 21
hpmcounter25 User-mode Hardware Performance Counter 22
hpmcounter26 User-mode Hardware Performance Counter 23
hpmcounter27 User-mode Hardware Performance Counter 24
hpmcounter28 User-mode Hardware Performance Counter 25
hpmcounter29 User-mode Hardware Performance Counter 26
hpmcounter3 User-mode Hardware Performance Counter 0
hpmcounter30 User-mode Hardware Performance Counter 27
hpmcounter31 User-mode Hardware Performance Counter 28
hpmcounter4 User-mode Hardware Performance Counter 1
hpmcounter5 User-mode Hardware Performance Counter 2
hpmcounter6 User-mode Hardware Performance Counter 3
hpmcounter7 User-mode Hardware Performance Counter 4
hpmcounter8 User-mode Hardware Performance Counter 5
hpmcounter9 User-mode Hardware Performance Counter 6
mhpmcounter10 Machine Hardware Performance Counter 10
mhpmcounter11 Machine Hardware Performance Counter 11
mhpmcounter12 Machine Hardware Performance Counter 12
mhpmcounter13 Machine Hardware Performance Counter 13
mhpmcounter14 Machine Hardware Performance Counter 14
mhpmcounter15 Machine Hardware Performance Counter 15
mhpmcounter16 Machine Hardware Performance Counter 16
mhpmcounter17 Machine Hardware Performance Counter 17
mhpmcounter18 Machine Hardware Performance Counter 18
mhpmcounter19 Machine Hardware Performance Counter 19
mhpmcounter20 Machine Hardware Performance Counter 20
mhpmcounter21 Machine Hardware Performance Counter 21
mhpmcounter22 Machine Hardware Performance Counter 22
mhpmcounter23 Machine Hardware Performance Counter 23
mhpmcounter24 Machine Hardware Performance Counter 24
mhpmcounter25 Machine Hardware Performance Counter 25
mhpmcounter26 Machine Hardware Performance Counter 26
mhpmcounter27 Machine Hardware Performance Counter 27
mhpmcounter28 Machine Hardware Performance Counter 28
mhpmcounter29 Machine Hardware Performance Counter 29
mhpmcounter3 Machine Hardware Performance Counter 3
mhpmcounter30 Machine Hardware Performance Counter 30
mhpmcounter31 Machine Hardware Performance Counter 31
mhpmcounter4 Machine Hardware Performance Counter 4
mhpmcounter5 Machine Hardware Performance Counter 5
mhpmcounter6 Machine Hardware Performance Counter 6
mhpmcounter7 Machine Hardware Performance Counter 7
mhpmcounter8 Machine Hardware Performance Counter 8
mhpmcounter9 Machine Hardware Performance Counter 9
mhpmevent10 Machine Hardware Performance Counter 10 Control
mhpmevent11 Machine Hardware Performance Counter 11 Control
mhpmevent12 Machine Hardware Performance Counter 12 Control
mhpmevent13 Machine Hardware Performance Counter 13 Control
mhpmevent14 Machine Hardware Performance Counter 14 Control
mhpmevent15 Machine Hardware Performance Counter 15 Control
mhpmevent16 Machine Hardware Performance Counter 16 Control
mhpmevent17 Machine Hardware Performance Counter 17 Control
mhpmevent18 Machine Hardware Performance Counter 18 Control
mhpmevent19 Machine Hardware Performance Counter 19 Control
mhpmevent20 Machine Hardware Performance Counter 20 Control
mhpmevent21 Machine Hardware Performance Counter 21 Control
mhpmevent22 Machine Hardware Performance Counter 22 Control
mhpmevent23 Machine Hardware Performance Counter 23 Control
mhpmevent24 Machine Hardware Performance Counter 24 Control
mhpmevent25 Machine Hardware Performance Counter 25 Control
mhpmevent26 Machine Hardware Performance Counter 26 Control
mhpmevent27 Machine Hardware Performance Counter 27 Control
mhpmevent28 Machine Hardware Performance Counter 28 Control
mhpmevent29 Machine Hardware Performance Counter 29 Control
mhpmevent3 Machine Hardware Performance Counter 3 Control
mhpmevent30 Machine Hardware Performance Counter 30 Control
mhpmevent31 Machine Hardware Performance Counter 31 Control
mhpmevent4 Machine Hardware Performance Counter 4 Control
mhpmevent5 Machine Hardware Performance Counter 5 Control
mhpmevent6 Machine Hardware Performance Counter 6 Control
mhpmevent7 Machine Hardware Performance Counter 7 Control
mhpmevent8 Machine Hardware Performance Counter 8 Control
mhpmevent9 Machine Hardware Performance Counter 9 Control
cycle Cycle counter for RDCYCLE Instruction
hedeleg Hypervisor Exception Delegation
hstateen0 Hypervisor State Enable 0 Register
hstateen1 Hypervisor State Enable 1 Register
hstateen2 Hypervisor State Enable 2 Register
hstateen3 Hypervisor State Enable 3 Register
hstatus Hypervisor Status
instret Instructions retired counter for RDINSTRET Instruction
marchid Machine Architecture ID
mcause Machine Cause
mconfigptr Machine Configuration Pointer
mcycle Machine Cycle Counter
medeleg Machine Exception Delegation
menvcfg Machine Environment Configuration
mepc Machine Exception Program Counter
mhartid Machine Hart ID
mideleg Machine Interrupt Delegation
mie Machine Interrupt Enable
mimpid Machine Implementation ID
minstret Machine Instructions Retired Counter
mip Machine Interrupt Pending
misa Machine ISA Control
mscratch Machine Scratch Register
mstateen0 Machine State Enable 0 Register
mstateen1 Machine State Enable 1 Register
mstateen2 Machine State Enable 2 Register
mstateen3 Machine State Enable 3 Register
mstatus Machine Status
mtval Machine Trap Value
mtvec Machine Trap Vector Control
mvendorid Machine Vendor ID
satp Supervisor Address Translation and Protection
scause Supervisor Cause
senvcfg Supervisor Environment Configuration
sepc Supervisor Exception Program Counter
sip Supervisor Interrupt Pending
sscratch Supervisor Scratch Register
sstateen0 Supervisor State Enable 0 Register
sstateen1 Supervisor State Enable 1 Register
sstateen2 Supervisor State Enable 2 Register
sstateen3 Supervisor State Enable 3 Register
sstatus Supervisor Status
stval Supervisor Trap Value
stvec Supervisor Trap Vector
time Timer for RDTIME Instruction
vscause Virtual Supervisor Cause
vsepc Virtual Supervisor Exception Program Counter
vsstatus Virtual Supervisor Status
vstval Virtual supervisor Trap Value
vstvec Supervisor Trap Vector